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An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

Home Page: https://chipyard.readthedocs.io/en/latest/

License: BSD 3-Clause "New" or "Revised" License

Makefile 6.53% Scala 29.33% C 56.14% C++ 1.30% Shell 3.85% Python 1.06% Verilog 0.46% Dockerfile 0.85% Tcl 0.25% Assembly 0.05% SystemVerilog 0.17%

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