csinko / io-master Goto Github PK

The power input OR'ing diodes dissipate a significant amount of power when operating near maximum power input. The USB FET switch dissipates a lot less power (0.018W vs. 0.160W).

We might want to investigate using ideal diodes or somehow eliminating the OR'ing diodes.

This will be put into the readme and be used for preliminary design presentations and discussions.

Cover what this component is responsible for, what it adds to the design of the project, and some challenges that will arise. Also cover any preliminary design ideas that exist.

• Check DAC reference voltage
• Check op-amp gain and resistor tolerances
• Maybe add calibration using mcu adc pins?

The following must be initialized for the MCU upon startup:

• All pins should be configured as inputs on first boot

When a configuration is set, the following must be changed to outputs for each IO Pin:

• Output pin -> Output, Timer Pin -> Input, Input Pin -> Input
• Output pin -> Input, Timer Pin -> Output, Input Pin -> Input
• Output pin -> Input, Timer Pin -> Input, Input Pin -> Input

^^ These are the only states that should be allowed

When switching between output pin and timer pin, MUST switch BOTH output pin and timer pins to inputs before setting the other pin as an output. This ensures we do not short anything on the board.

All Unused pins should be set to output and driven low.

The Termination and Pulldown resistor control pins along with the tristate pins are active low, so they should be set high when made into outputs

The differential pins are active high, set to low when made an output (default to single ended)

The DAC needs to be set to whatever value correlates to ~1.4 volts (needs calculated)

@codeThatThinks, we also need to measure the amount of time it takes for the DAC to be set from first turning on with a scope.

Choose a specific SPI device for the mid-term demo. Make a write up with the following:

• Specific device and communication specs
• Info from datasheet that the end user would need to know
• What capabilities of the I/O Master are actually being demonstrated

Come up with a list of commands that we need to implement, and figure out how many bits are needed for them.

Then create a document that lists what each command is, how to use it, etc.

Also determine any sort of machine states are necessary for the device to accept the command. i.e. It wouldn't make sense to change the frequency while sending data!

Redesign the pull-up/pull-down circuit so that the control pins are multiplexed. Idea: use a tri-state output to control them (LOW: pull-down enabled, HIGH: pull-up enabled, High-Z: both disabled)

This would save 8 MCU pins, allowing us to use the LQFP100 package: 8 PU, 8 PD pins -> 8 PU/PD pins

We will want a UI for users to define, edit, and select protocols for our tool. Users will need to be able to

• Define clock signal speeds
• Set expected voltage levels
• Define ranges for a logic 0 and a logic 1
• Give names and descriptions for protocols
• Select protocols being used, assign pins
• Select data to send
• Start and stop the device, along with other operations

There are a few options I am aware of that can be used for GUIs in Python
PyQT
Tkinter
Kivy

Do research and testing on these frameworks, and get a feel for making GUI elements with Python. Decide the pros and cons of all the frameworks you test, and we will decide which one to use officially for the project.

See if we can redesign this circuit to use discrete transistors instead of op-amps. We need to reduce the part count and BOM cost.

This will be put into the readme and be used for preliminary design presentations and discussions.

Cover what this component is responsible for, what it adds to the design of the project, and some challenges that will arise. Also cover any preliminary design ideas that exist.

The MCU logic levels on the IO_OUT, IO_TRIS, IO_CLK pins do not appear to be close to the expected HIGH/LOW voltages: 3.3V and 0V. The issue is mainly with the LOW voltage.

• See if a VCO with digital interface can be used to prevent clock jitter
• Look at generating required clocks internally

• Calculate actual required current rating and adjust circuit design
• Recalculate inductor sizing
• Investigate cheaper alternatives to ADP5070 chip

To better learn how to operate DMA and to get an idea of the flexibility possible, create a program that reads data from one interface into DMA, then outputs the data out another interface.

Attempt any forms of optimizations that seem possible to limit the amount of interrupts. Also do tests to limit the amount of memory used in the buffer when streaming data, as this will open up opportunities to increase the throughput of the device

Investigate more cost effective designs

• Output Driver ideas

  • MCU -> DAC -> Linear Amplifier
  • MCU -> Shift Register -> High Speed Mux -> Parallel DAC -> Linear Amplifier

• Receiver ideas

  • ???

This will be put into the readme and be used for preliminary design presentations and discussions.

Cover what this component is responsible for, what it adds to the design of the project, and some challenges that will arise. Also cover any preliminary design ideas that exist.

Choose specific devices that demonstrate SPI, I2C, RS-232, RS-485, and SWD communication, as well as all of the key features of the I/O Master.

We will need to be able to patch in and switch between different frequencies for the project. The MCU has the ability to use an external clock, but we need the flexibility to set these clocks and assign them to various I/O lines (potentially multiple lines simultaneously.

Learn how to read in and use external clock signals, make a test application to utilize external clock signals, and determine how we can control where a clock signal connects to, whether its through software routing or hardware routing (mux, demux, etc.)

Draw up a schematic for the STM32F7 chip including power supply for mcu.

• Find/create KiCAD symbol for mcu
• Voltage regulator for mcu
• Decouping

Choose a USB PHY from Digikey so that we can used USB 2.0 High Speed on the microcontroller. Draw up a schematic with USB connector, USB protection, PHY chip, and microcontroller interface.

Draw up a complete PCB design with all subsystems.

Get USB CDC working.

Make the buffers as big as possible, find out how fast data can move.

Redesign the level shifter to include a proper gate driver so that 10MHz can be achieved.

• discrete output stage with gate driver
• discrete input stage with proper voltage range
• draw up pull-up/pull-down/termination resistors

This will be put into the readme and be used for preliminary design presentations and discussions.

Cover what this component is responsible for, what it adds to the design of the project, and some challenges that will arise. Also cover any preliminary design ideas that exist.

Recalculate component values for the +/-24V regulator so that it now outputs +/-15V.

Combine all subsystem schematics into one complete KiCAD project. Generate a BOM.

The current linear regulator dissipates 1.555W of heat when using the 12V DC input. Total 3.3V rail load is estimated at about 178mA, so the regulator should be replaced with one spec'd for 200mA. We might want to change it to a switching regulator in order to improve efficiency.

Subsystem preliminary functions/requirements:

• Bi-directional level shifting from mcu logic levels (3.3v) to output logic levels (anywhere from 3.3-24v)
• Implement high, low, and tri-state (floating)
• Implement pull-up and pull-down resistors
• Selectable single-ended or differential signalling mode

Create a block diagram of all of the components to get a broad overview of how the device will function

Draw up a schematic of the STM32H7 with:

• Power supply and decoupling
  --Pick a 3.3v linear regulator (maybe a 250mA)
• Crystal oscillator and clock source
  --Do we need two, one for the CPU, one for the USB
  --Capacitors needed as well
• Reset circuit
  --Hardware reset button
  --How did the development board do it?
• Programming/debug header
• USB interface
  --See USB issue

Revise the PCB layout for I/O Master v2 hardware.

Draw up the circuit protection circuit in Kicad that was used during the end of semester demo.

Design an adjustable regulator for powering the target device. Must be 3-24V output, 100mA.

This will be put into the readme and be used for preliminary design presentations and discussions.

Cover what this component is responsible for, what it adds to the design of the project, and some challenges that will arise. Also cover any preliminary design ideas that exist.

Revise the schematic and BOM for the I/O Master v2 hardware.

• Research what kinds of things I/O pins need to be protected against
• Research possible protection circuits
• Begin preliminary schematic of protection subsystem

Finalize what pins we are going to use

A thorough design review is needed of the Rev 1 schematic, BOM, and PCB layout.

This is a placeholder for any issues that come up.

• lorem ipsum