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ctag-fh-kiel avatar ctag-fh-kiel commented on May 17, 2024

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polymer81 avatar polymer81 commented on May 17, 2024

I will resolder the joints just in case and get another SD card. When I use examples from the SD library I can read / write without problems. When the SD card is removed it also reboots in a loop. I will start with the solder joints.

One other thing I am wondering about, when it boots up and I can edit wifi settings and such, if I would open Slot settings it always triggers a reboot loop. In the monitor it says can´t open Config.json and Default.json - would that cause a reboot ?

Thanks :)

from ctag-straempler.

polymer81 avatar polymer81 commented on May 17, 2024

I resoldered and measured pins between the SD card and Wrover module - all ok. I still have this reboot loop, both with SD card and without:

ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x1b (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:4
load:0x3fff0034,len:7316
load:0x40078000,len:14252
load:0x40080400,len:4688
entry 0x400806a4
�[0;32mI (28) boot: ESP-IDF v4.1.2-95-gaeb66e1057 2nd stage bootloader�[0m
�[0;32mI (28) boot: compile time 09:31:00�[0m
�[0;32mI (28) boot: chip revision: 1�[0m
�[0;32mI (32) boot_comm: chip revision: 1, min. bootloader chip revision: 0�[0m
�[0;32mI (39) qio_mode: Enabling default flash chip QIO�[0m
�[0;32mI (45) boot.esp32: SPI Speed : 40MHz�[0m
�[0;32mI (49) boot.esp32: SPI Mode : QIO�[0m
�[0;32mI (54) boot.esp32: SPI Flash Size : 4MB�[0m
�[0;32mI (58) boot: Enabling RNG early entropy source...�[0m
�[0;32mI (64) boot: Partition Table:�[0m
�[0;32mI (67) boot: ## Label Usage Type ST Offset Length�[0m
�[0;32mI (75) boot: 0 nvs WiFi data 01 02 00009000 00006000�[0m
�[0;32mI (82) boot: 1 phy_init RF data 01 01 0000f000 00001000�[0m
�[0;32mI (90) boot: 2 factory factory app 00 00 00010000 00200000�[0m
�[0;32mI (97) boot: End of partition table�[0m
�[0;32mI (101) boot_comm: chip revision: 1, min. application chip revision: 0�[0m
�[0;32mI (108) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x2f0f0 (192752) map�[0m
�[0;32mI (188) esp_image: segment 1: paddr=0x0003f118 vaddr=0x3ffb0000 size=0x00f00 ( 3840) load�[0m
�[0;32mI (190) esp_image: segment 2: paddr=0x00040020 vaddr=0x400d0020 size=0xc7854 (817236) map�[0m
�[0;32mI (492) esp_image: segment 3: paddr=0x0010787c vaddr=0x3ffb0f00 size=0x05628 ( 22056) load�[0m
�[0;32mI (501) esp_image: segment 4: paddr=0x0010ceac vaddr=0x40080000 size=0x00404 ( 1028) load�[0m
�[0;32mI (502) esp_image: segment 5: paddr=0x0010d2b8 vaddr=0x40080404 size=0x1e134 (123188) load�[0m
�[0;32mI (580) boot: Loaded app from partition at offset 0x10000�[0m
�[0;32mI (580) boot: Disabling RNG early entropy source...�[0m
�[0;32mI (580) psram: This chip is ESP32-D0WD�[0m
�[0;32mI (585) spiram: Found 64MBit SPI RAM device�[0m
�[0;32mI (589) spiram: SPI RAM mode: flash 80m sram 80m�[0m
�[0;32mI (595) spiram: PSRAM initialized, cache is in low/high (2-core) mode.�[0m
�[0;32mI (602) cpu_start: Pro cpu up.�[0m
�[0;32mI (606) cpu_start: Application information:�[0m
�[0;32mI (610) cpu_start: Project name: ctag-straempler�[0m
�[0;32mI (616) cpu_start: App version: v0.9�[0m
�[0;32mI (621) cpu_start: Compile time: Sep 11 2021 09:54:10�[0m
�[0;32mI (627) cpu_start: ELF file SHA256: 32bab0cc5eb6c006...�[0m
�[0;32mI (633) cpu_start: ESP-IDF: v4.1.2-95-gaeb66e1057�[0m
�[0;32mI (639) cpu_start: Starting app cpu, entry point is 0x40081720�[0m
�[0;32mI (0) cpu_start: App cpu up.�[0m
�[0;32mI (1121) spiram: SPI SRAM memory test OK�[0m
�[0;32mI (1122) heap_init: Initializing. RAM available for dynamic allocation:�[0m
�[0;32mI (1122) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM�[0m
�[0;32mI (1128) heap_init: At 3FFBEEB0 len 00021150 (132 KiB): DRAM�[0m
�[0;32mI (1134) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM�[0m
�[0;32mI (1141) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM�[0m
�[0;32mI (1147) heap_init: At 4009E538 len 00001AC8 (6 KiB): IRAM�[0m
�[0;32mI (1154) cpu_start: Pro cpu start user code�[0m
�[0;32mI (1158) spiram: Adding pool of 4096K of external SPI memory to heap allocator�[0m
�[0;32mI (1179) spi_flash: detected chip: generic�[0m
�[0;32mI (1179) spi_flash: flash io: qio�[0m
�[0;32mI (1179) cpu_start: Starting scheduler on PRO CPU.�[0m
�[0;32mI (0) cpu_start: Starting scheduler on APP CPU.�[0m
�[0;32mI (1188) SD: Initializing SD card�[0m
�[0;32mI (1188) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
Name: SS16G
Type: SDHC/SDXC
Speed: 40 MHz
Size: 15193MB
SPI: display device added to spi bus (1)

SPI: attached display device, speed=8000000

SPI: bus uses native pins: false

SPI: display init...

OK

SPI: Max rd speed = 1000000

SPI: Changed speed to 26666666

�[0;32mI (6058) gpio: GPIO[33]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (6058) gpio: GPIO[34]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (6058) gpio: GPIO[35]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (6068) gpio: GPIO[36]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (6078) gpio: GPIO[39]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (6088) AUDIO: Starting audio task�[0m
�[0;32mI (6098) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (6098) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (6118) I2S: APLL: Req RATE: 44100, real rate: 44099.988, BITS: 32, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0�[0m
�[0;31mE (6238) sdmmc_cmd: sdmmc_read_sectors_dma: sdmmc_send_cmd returned 0xffffffff�[0m
�[0;31mE (6238) diskio_sdmmc: sdmmc_read_blocks failed (-1)�[0m
�[0;31mE (6238) sdmmc_req: handle_idle_state_events unhandled: 00000000 00000002�[0m
�[0;31mE (6248) sdmmc_req: handle_idle_state_events unhandled: 00000008 00000002�[0m
I (6458) wifi:wifi driver task: 3ffe9e1c, prio:23, stack:6656, core=0
�[0;32mI (6458) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
�[0;32mI (6458) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
I (6478) wifi:wifi firmware version: 1424aca
I (6478) wifi:config NVS flash: enabled
I (6478) wifi:config nano formating: disabled
I (6478) wifi:Init data frame dynamic rx buffer num: 32
I (6488) wifi:Init management frame dynamic rx buffer num: 32
I (6488) wifi:Init management short buffer num: 32
I (6498) wifi:Init static tx buffer num: 16
I (6498) wifi:Init static rx buffer size: 1600
I (6508) wifi:Init static rx buffer num: 10
I (6508) wifi:Init dynamic rx buffer num: 32
�[0;32mI (6518) wifi_init: rx ba win: 16�[0m
�[0;32mI (6518) wifi_init: tcpip mbox: 32�[0m
�[0;32mI (6518) wifi_init: udp mbox: 6�[0m
�[0;32mI (6528) wifi_init: tcp mbox: 6�[0m
�[0;32mI (6528) wifi_init: tcp tx win: 5744�[0m
�[0;32mI (6538) wifi_init: tcp rx win: 5744�[0m
�[0;32mI (6538) wifi_init: tcp mss: 1440�[0m
�[0;32mI (6538) wifi_init: WiFi/LWIP prefer SPIRAM�[0m
�[0;32mI (6548) wifi_init: WiFi IRAM OP enabled�[0m
�[0;32mI (6548) wifi_init: WiFi RX IRAM OP enabled�[0m
�[0;32mI (6558) WIFI: Setting WiFi configuration SSID Fantasy Man�[0m
�[0;32mI (6558) phy_init: phy_version 4660,0162888,Dec 23 2020�[0m
�[0;33mW (6568) phy_init: failed to load RF calibration data (0x1102), falling back to full calibration�[0m
ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x1b (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:4
load:0x3fff0034,len:7316
load:0x40078000,len:14252
load:0x40080400,len:4688
entry 0x400806a4
�[0;32mI (28) boot: ESP-IDF v4.1.2-95-gaeb66e1057 2nd stage bootloader�[0m
�[0;32mI (28) boot: compile time 09:31:00�[0m
�[0;32mI (28) boot: chip revision: 1�[0m
�[0;32mI (32) boot_comm: chip revision: 1, min. bootloader chip revision: 0�[0m
�[0;32mI (39) qio_mode: Enabling default flash chip QIO�[0m
�[0;32mI (44) boot.esp32: SPI Speed : 40MHz�[0m
�[0;32mI (49) boot.esp32: SPI Mode : QIO�[0m
�[0;32mI (54) boot.esp32: SPI Flash Size : 4MB�[0m
�[0;32mI (58) boot: Enabling RNG early entropy source...�[0m
�[0;32mI (64) boot: Partition Table:�[0m
�[0;32mI (67) boot: ## Label Usage Type ST Offset Length�[0m
�[0;32mI (74) boot: 0 nvs WiFi data 01 02 00009000 00006000�[0m
�[0;32mI (82) boot: 1 phy_init RF data 01 01 0000f000 00001000�[0m
�[0;32mI (89) boot: 2 factory factory app 00 00 00010000 00200000�[0m
�[0;32mI (97) boot: End of partition table�[0m
�[0;32mI (101) boot_comm: chip revision: 1, min. application chip revision: 0�[0m
�[0;32mI (108) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x2f0f0 (192752) map�[0m
�[0;32mI (187) esp_image: segment 1: paddr=0x0003f118 vaddr=0x3ffb0000 size=0x00f00 ( 3840) load�[0m
�[0;32mI (189) esp_image: segment 2: paddr=0x00040020 vaddr=0x400d0020 size=0xc7854 (817236) map�[0m
�[0;32mI (492) esp_image: segment 3: paddr=0x0010787c vaddr=0x3ffb0f00 size=0x05628 ( 22056) load�[0m
�[0;32mI (501) esp_image: segment 4: paddr=0x0010ceac vaddr=0x40080000 size=0x00404 ( 1028) load�[0m
�[0;32mI (502) esp_image: segment 5: paddr=0x0010d2b8 vaddr=0x40080404 size=0x1e134 (123188) load�[0m
�[0;32mI (579) boot: Loaded app from partition at offset 0x10000�[0m
�[0;32mI (580) boot: Disabling RNG early entropy source...�[0m
�[0;32mI (580) psram: This chip is ESP32-D0WD�[0m
�[0;32mI (584) spiram: Found 64MBit SPI RAM device�[0m
�[0;32mI (589) spiram: SPI RAM mode: flash 80m sram 80m�[0m
�[0;32mI (594) spiram: PSRAM initialized, cache is in low/high (2-core) mode.�[0m
�[0;32mI (602) cpu_start: Pro cpu up.�[0m
�[0;32mI (605) cpu_start: Application information:�[0m
�[0;32mI (610) cpu_start: Project name: ctag-straempler�[0m
�[0;32mI (616) cpu_start: App version: v0.9�[0m
�[0;32mI (621) cpu_start: Compile time: Sep 11 2021 09:54:10�[0m
�[0;32mI (627) cpu_start: ELF file SHA256: 32bab0cc5eb6c006...�[0m
�[0;32mI (633) cpu_start: ESP-IDF: v4.1.2-95-gaeb66e1057�[0m
�[0;32mI (639) cpu_start: Starting app cpu, entry point is 0x40081720�[0m
�[0;32mI (0) cpu_start: App cpu up.�[0m
�[0;32mI (1121) spiram: SPI SRAM memory test OK�[0m
�[0;32mI (1121) heap_init: Initializing. RAM available for dynamic allocation:�[0m
�[0;32mI (1122) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM�[0m
�[0;32mI (1128) heap_init: At 3FFBEEB0 len 00021150 (132 KiB): DRAM�[0m
�[0;32mI (1134) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM�[0m
�[0;32mI (1141) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM�[0m
�[0;32mI (1147) heap_init: At 4009E538 len 00001AC8 (6 KiB): IRAM�[0m
�[0;32mI (1153) cpu_start: Pro cpu start user code�[0m
�[0;32mI (1158) spiram: Adding pool of 4096K of external SPI memory to heap allocator�[0m
�[0;32mI (1178) spi_flash: detected chip: generic�[0m
�[0;32mI (1179) spi_flash: flash io: qio�[0m
�[0;32mI (1179) cpu_start: Starting scheduler on PRO CPU.�[0m
�[0;32mI (0) cpu_start: Starting scheduler on APP CPU.�[0m
�[0;32mI (1188) SD: Initializing SD card�[0m
�[0;32mI (1188) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
Name: SS16G
Type: SDHC/SDXC
Speed: 40 MHz
Size: 15193MB
SPI: display device added to spi bus (1)

SPI: attached display device, speed=8000000

SPI: bus uses native pins: false

SPI: display init...

OK

SPI: Max rd speed = 1000000

SPI: Changed speed to 26666666

�[0;32mI (5918) gpio: GPIO[33]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (5918) gpio: GPIO[34]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (5918) gpio: GPIO[35]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (5928) gpio: GPIO[36]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (5938) gpio: GPIO[39]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (5948) AUDIO: Starting audio task�[0m
�[0;32mI (5958) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (5958) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (5978) I2S: APLL: Req RATE: 44100, real rate: 44099.988, BITS: 32, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0�[0m
I (6198) wifi:wifi driver task: 3ffe9e1c, prio:23, stack:6656, core=0
�[0;32mI (6198) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
�[0;32mI (6198) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
I (6218) wifi:wifi firmware version: 1424aca
I (6218) wifi:config NVS flash: enabled
I (6218) wifi:config nano formating: disabled
I (6218) wifi:Init data frame dynamic rx buffer num: 32
I (6228) wifi:Init management frame dynamic rx buffer num: 32
I (6228) wifi:Init management short buffer num: 32
I (6238) wifi:Init static tx buffer num: 16
I (6238) wifi:Init static rx buffer size: 1600
I (6248) wifi:Init static rx buffer num: 10
I (6248) wifi:Init dynamic rx buffer num: 32
�[0;32mI (6258) wifi_init: rx ba win: 16�[0m
�[0;32mI (6258) wifi_init: tcpip mbox: 32�[0m
�[0;32mI (6258) wifi_init: udp mbox: 6�[0m
�[0;32mI (6268) wifi_init: tcp mbox: 6�[0m
�[0;32mI (6268) wifi_init: tcp tx win: 5744�[0m
�[0;32mI (6278) wifi_init: tcp rx win: 5744�[0m
�[0;32mI (6278) wifi_init: tcp mss: 1440�[0m
�[0;32mI (6278) wifi_init: WiFi/LWIP prefer SPIRAM�[0m
�[0;32mI (6288) wifi_init: WiFi IRAM OP enabled�[0m
�[0;32mI (6288) wifi_init: WiFi RX IRAM OP enabled�[0m
�[0;32mI (6298) WIFI: Setting WiFi configuration SSID Fantasy Man�[0m
�[0;32mI (6298) phy_init: phy_version 4660,0162888,Dec 23 2020�[0m
�[0;33mW (6308) phy_init: failed to load RF calibration data (0x1102), falling back to full calibration�[0m
ets Jun 8 2016 00:22:57

from ctag-straempler.

ctag-fh-kiel avatar ctag-fh-kiel commented on May 17, 2024

from ctag-straempler.

polymer81 avatar polymer81 commented on May 17, 2024

I will try that, thanks !

from ctag-straempler.

polymer81 avatar polymer81 commented on May 17, 2024

The rebooting is fixed by removing the MIC803 chip, thanks :)

I can load samples to it through the browser, but it seems to overwrite config.json file with a blank one and if I open Slot menu it resets with this :

�[0;31mE (65919) FILEIO: Could not open file /sdcard/CONFIG.JSN for reading�[0m
Guru Meditation Error: Core 0 panic'ed (LoadProhibited). Exception was unhandled.
Core 0 register dump:
PC : 0x400dfba2 PS : 0x00060930 A0 : 0x800d9e51 A1 : 0x3ffd6e30
A2 : 0x00000001 A3 : 0x00000040 A4 : 0x3ffb6f08 A5 : 0x00000000
A6 : 0x00000001 A7 : 0x00000000 A8 : 0x800dfb9e A9 : 0x3ffd6e10
A10 : 0x00000000 A11 : 0x00000040 A12 : 0x3f40799c A13 : 0x00000001
A14 : 0x3f407bc0 A15 : 0x3ffd6e00 SAR : 0x0000001b EXCCAUSE: 0x0000001c
EXCVADDR: 0x00000010 LBEG : 0x4008c8c1 LEND : 0x4008c8d1 LCOUNT : 0xffffffff

ELF file SHA256: 32bab0cc5eb6c006

Backtrace: 0x400dfb9f:0x3ffd6e30 0x400d9e4e:0x3ffd6ea0 0x401934e2:0x3ffd6ec0 0x400d9ecf:0x3ffd6ee0 0x400d7527:0x3ffd6f00

Rebooting...
ets Jun 8 2016 00:22:57

rst:0xc (SW_CPU_RESET),boot:0x1b (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0030,len:4
load:0x3fff0034,len:7316
load:0x40078000,len:14252
load:0x40080400,len:4688
entry 0x400806a4
�[0;32mI (29) boot: ESP-IDF v4.1.2-95-gaeb66e1057 2nd stage bootloader�[0m
�[0;32mI (29) boot: compile time 09:31:00�[0m
�[0;32mI (29) boot: chip revision: 1�[0m
�[0;32mI (33) boot_comm: chip revision: 1, min. bootloader chip revision: 0�[0m
�[0;32mI (40) qio_mode: Enabling default flash chip QIO�[0m
�[0;32mI (46) boot.esp32: SPI Speed : 80MHz�[0m
�[0;32mI (50) boot.esp32: SPI Mode : QIO�[0m
�[0;32mI (55) boot.esp32: SPI Flash Size : 4MB�[0m
�[0;32mI (59) boot: Enabling RNG early entropy source...�[0m
�[0;32mI (65) boot: Partition Table:�[0m
�[0;32mI (68) boot: ## Label Usage Type ST Offset Length�[0m
�[0;32mI (76) boot: 0 nvs WiFi data 01 02 00009000 00006000�[0m
�[0;32mI (83) boot: 1 phy_init RF data 01 01 0000f000 00001000�[0m
�[0;32mI (90) boot: 2 factory factory app 00 00 00010000 00200000�[0m
�[0;32mI (98) boot: End of partition table�[0m
�[0;32mI (102) boot_comm: chip revision: 1, min. application chip revision: 0�[0m
�[0;32mI (109) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x2f0f0 (192752) map�[0m
�[0;32mI (182) esp_image: segment 1: paddr=0x0003f118 vaddr=0x3ffb0000 size=0x00f00 ( 3840) load�[0m
�[0;32mI (184) esp_image: segment 2: paddr=0x00040020 vaddr=0x400d0020 size=0xc7854 (817236) map�[0m
�[0;32mI (459) esp_image: segment 3: paddr=0x0010787c vaddr=0x3ffb0f00 size=0x05628 ( 22056) load�[0m
�[0;32mI (468) esp_image: segment 4: paddr=0x0010ceac vaddr=0x40080000 size=0x00404 ( 1028) load�[0m
�[0;32mI (468) esp_image: segment 5: paddr=0x0010d2b8 vaddr=0x40080404 size=0x1e134 (123188) load�[0m
�[0;32mI (541) boot: Loaded app from partition at offset 0x10000�[0m
�[0;32mI (541) boot: Disabling RNG early entropy source...�[0m
�[0;32mI (541) psram: This chip is ESP32-D0WD�[0m
�[0;32mI (546) spiram: Found 64MBit SPI RAM device�[0m
�[0;32mI (550) spiram: SPI RAM mode: flash 80m sram 80m�[0m
�[0;32mI (556) spiram: PSRAM initialized, cache is in low/high (2-core) mode.�[0m
�[0;32mI (563) cpu_start: Pro cpu up.�[0m
�[0;32mI (567) cpu_start: Application information:�[0m
�[0;32mI (571) cpu_start: Project name: ctag-straempler�[0m
�[0;32mI (577) cpu_start: App version: v0.9�[0m
�[0;32mI (582) cpu_start: Compile time: Sep 11 2021 09:54:10�[0m
�[0;32mI (588) cpu_start: ELF file SHA256: 32bab0cc5eb6c006...�[0m
�[0;32mI (594) cpu_start: ESP-IDF: v4.1.2-95-gaeb66e1057�[0m
�[0;32mI (600) cpu_start: Starting app cpu, entry point is 0x40081720�[0m
�[0;32mI (592) cpu_start: App cpu up.�[0m
�[0;32mI (1082) spiram: SPI SRAM memory test OK�[0m
�[0;32mI (1083) heap_init: Initializing. RAM available for dynamic allocation:�[0m
�[0;32mI (1083) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM�[0m
�[0;32mI (1089) heap_init: At 3FFBEEB0 len 00021150 (132 KiB): DRAM�[0m
�[0;32mI (1096) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM�[0m
�[0;32mI (1102) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM�[0m
�[0;32mI (1109) heap_init: At 4009E538 len 00001AC8 (6 KiB): IRAM�[0m
�[0;32mI (1115) cpu_start: Pro cpu start user code�[0m
�[0;32mI (1120) spiram: Adding pool of 4096K of external SPI memory to heap allocator�[0m
�[0;32mI (1140) spi_flash: detected chip: generic�[0m
�[0;32mI (1140) spi_flash: flash io: qio�[0m
�[0;32mI (1140) cpu_start: Starting scheduler on PRO CPU.�[0m
�[0;32mI (0) cpu_start: Starting scheduler on APP CPU.�[0m
�[0;32mI (1149) SD: Initializing SD card�[0m
�[0;32mI (1149) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;31mE (1219) sdmmc_sd: sdmmc_send_cmd_switch_func: sdmmc_send_cmd returned 0x109�[0m
�[0;31mE (1219) SD: Failed to initialize the card (265). Make sure SD card lines have pull-up resistors in place.�[0m
SPI: display device added to spi bus (1)

SPI: attached display device, speed=8000000

SPI: bus uses native pins: false

SPI: display init...

OK

SPI: Max rd speed = 1000000

SPI: Changed speed to 26666666

�[0;32mI (2679) gpio: GPIO[33]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (2679) gpio: GPIO[34]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (2689) gpio: GPIO[35]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:2 �[0m
�[0;32mI (2699) gpio: GPIO[36]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (2709) gpio: GPIO[39]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 �[0m
�[0;32mI (2719) AUDIO: Starting audio task�[0m
�[0;32mI (2719) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (2729) I2S: DMA Malloc info, datalen=blocksize=256, dma_buf_count=4�[0m
�[0;32mI (2749) I2S: APLL: Req RATE: 44100, real rate: 44099.988, BITS: 32, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0�[0m
�[0;31mE (2759) FILEIO: Could not open file /sdcard/CONFIG.JSN for reading�[0m
�[0;31mE (2759) AUDIO: Couldn't open config.jsn�[0m
�[0;31mE (2769) FILEIO: Could not open file /sdcard/CONFIG.JSN for reading�[0m
�[0;31mE (2769) FILEIO: Could not open file /sdcard/banks/DEFAULT.JSN for reading�[0m
�[0;31mE (2779) PRESET: Root is NULL�[0m
�[0;31mE (2789) MENU: Error loading bank from file�[0m
�[0;31mE (2789) MENU: Error loading bank�[0m
�[0;31mE (2789) FILEIO: Could not open file /sdcard/CONFIG.JSN for reading�[0m
�[0;31mE (2799) MENU: Error loading tz_shift from config�[0m
I (2959) wifi:wifi driver task: 3ffdd804, prio:23, stack:6656, core=0
�[0;32mI (2959) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
�[0;32mI (2959) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE�[0m
I (2979) wifi:wifi firmware version: 1424aca
I (2979) wifi:config NVS flash: enabled
I (2979) wifi:config nano formating: disabled
I (2979) wifi:Init data frame dynamic rx buffer num: 32
I (2989) wifi:Init management frame dynamic rx buffer num: 32
I (2989) wifi:Init management short buffer num: 32
I (2999) wifi:Init static tx buffer num: 16
I (2999) wifi:Init static rx buffer size: 1600
I (3009) wifi:Init static rx buffer num: 10
I (3009) wifi:Init dynamic rx buffer num: 32
�[0;32mI (3019) wifi_init: rx ba win: 16�[0m
�[0;32mI (3019) wifi_init: tcpip mbox: 32�[0m
�[0;32mI (3019) wifi_init: udp mbox: 6�[0m
�[0;32mI (3029) wifi_init: tcp mbox: 6�[0m
�[0;32mI (3029) wifi_init: tcp tx win: 5744�[0m
�[0;32mI (3039) wifi_init: tcp rx win: 5744�[0m
�[0;32mI (3039) wifi_init: tcp mss: 1440�[0m
�[0;32mI (3039) wifi_init: WiFi/LWIP prefer SPIRAM�[0m
�[0;32mI (3049) wifi_init: WiFi IRAM OP enabled�[0m
�[0;32mI (3049) wifi_init: WiFi RX IRAM OP enabled�[0m
�[0;31mE (3059) FILEIO: Could not open file /sdcard/CONFIG.JSN for reading�[0m
�[0;31mE (3059) FILEIO: root == NULL�[0m
�[0;32mI (3069) WIFI: Setting WiFi configuration SSID ��⸮?��[0m
�[0;32mI (3069) phy_init: phy_version 4660,0162888,Dec 23 2020�[0m
I (3159) wifi:mode : sta (b8:f0:09:80:a9:d8)

Is there anything else that should be on SD card (heard about an excel file but could not find) - this is what I have

Folders

BANKS, POOl, RAW, USR

Files

Config.json and Silence.RAW

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polymer81 avatar polymer81 commented on May 17, 2024

The SD card holder I have is missing one pin - pin1 / DAT2, that is not used in the code or in the schematic.
Could that cause any problems ?

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ctag-fh-kiel avatar ctag-fh-kiel commented on May 17, 2024

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polymer81 avatar polymer81 commented on May 17, 2024

Ok, great - now I understand how it works. Thanks for the help.

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