danielholanda / leflow Goto Github PK

Hello David!

Thank you for this amazing project!
As I saw in your other issues, it seems complicated if not impossible to get your project to work with Xilinx devices. What exactly would one need to do to enable support for Xilinx. I have access to Vivado HLS (not the source code) so I would like to use that instead of LegUp if at all possible.

Thanks for your help!

Hi,
I would like to convert Tensorflow code into HDL using Leflow tool-kit, however provided Legup virtual machine link does not seem to be working - (http://legup.eecg.utoronto.ca). Tried this one (from #18) - no luck either.
Where else can I find Leflow supported Legup 4.0 version?
Thanks!

Hello,

I am very interested on LeFlow. I am trying to use Xilinx FPGAs with AXI memory interfaces. As far as I know, LegUp supports to create this kind of memory interfaces by setting an argument.

I was looking to LeFlow code and didn't find where to set up arguments for LegUp. Do you have any suggestion or direction where should I look for? Is it there any source file where all the arguments are set?

Thanks a lot,
Ivan

Hi again!

I have managed to successfully install LeFlow with the modified version of TensorFlow. I ran the run_test.py file with no errors.

Now, I wrote a graph that I used for my research and I would like to transform it in hardware for testing.

I get the following error:
legup@legup-vm:~/LeFlow/test$ ../../src/LeFlow my_model.py
INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
INFO: Cleaning unused dumped files...
Traceback (most recent call last):
File "../../src/LeFlow", line 195, in
run_leflow(args.file_name,tool_path)
File "../../src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: 'my_model_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'

I have seen a few people with this error in the issues but I have not been able to fix my error with their solutions.

I can supply my code if necessary.

Thank you for your help!

i keep running into problems running LegUp on my ubuntu 14-62bit:

cant find a way to solve this problem.

i only need to use LeFlow for getting an initial verilog file for Deep Lab v3 by Tensorflow.
https://github.com/tensorflow/models/tree/master/research/deeplab

if anyone can send it to me via mail,
or help me get LeFlow and LegUp working i will be very glad !

thanks in advance !
Amit

When I tried to run maxpoolingMNIST.py, I got below mentioned error

legup@legup-vm:~/LeFlow/examples/maxpoolMNIST$ ../../src/LeFlow maxpoolMNIST.py INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
INFO: Cleaning unused dumped files...
Traceback (most recent call last):
File "../../src/LeFlow", line 200, in
run_leflow(args.file_name,tool_path)
File "../../src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: 'maxpoolMNIST_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'

I have downloaded virtual image from http://legup.eecg.utoronto.ca/legup-4.0-ubuntu-64-14.04.vdi. And booted into the VM. Tried installing tensorflow by following the instructions in the README file. Below is the error message I got while installing.

legup@legup-vm:~$ sudo python -m pip install --upgrade pip
Cannot fetch index base URL https://pypi.python.org/simple/
Could not find any downloads that satisfy the requirement pip in /usr/lib/python2.7/dist-packages
Downloading/unpacking pip
Cleaning up...
No distributions at all found for pip in /usr/lib/python2.7/dist-packages
Storing debug log for failure in /home/legup/.pip/pip.log
legup@legup-vm:~$ sudo pip install tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl --ignore-installed six
Requirement 'tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl' looks like a filename, but the file does not exist
tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl is not a supported wheel on this platform.
Storing debug log for failure in /home/legup/.pip/pip.log

The pip.log file contains

/usr/bin/pip run on Fri Mar 15 05:13:15 2019
Requirement 'tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl' looks like a filename, but the file does not exist
tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl is not a supported wheel on this platform.
Exception information:
Traceback (most recent call last):
  File "/usr/lib/python2.7/dist-packages/pip/basecommand.py", line 122, in main
    status = self.run(options, args)
  File "/usr/lib/python2.7/dist-packages/pip/commands/install.py", line 257, in run
    InstallRequirement.from_line(name, None))
  File "/usr/lib/python2.7/dist-packages/pip/req.py", line 168, in from_line
    raise UnsupportedWheel("%s is not a supported wheel on this platform." % wheel.filename)
UnsupportedWheel: tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl is not a supported wheel on this platform.

I tried installing tensorflow from source by replacing the modified files given in the repository, but failed to do so.
Please help me solve the issue asap. Thanks in advance.

Hi,

I am following the instructions in the repo. I am working on the legup VM but when trying to install tensorflow as described in the instructions, i.e. running: pip install tensorflow-1.6.0-cp27-cp27mu-linux_x86_64 --ignore-installed six I get the following error: tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl is not a supported wheel on this platform.

Any ideas on how to solve this? Thanks!

Hi Daniel,
Really helpful tool and well documented.

I had a question on how you changed the output to the hex display in the demo. If you could either share the verilog file or the part of the code,it would be really helpful.

Thank you in advance.

Hello Daniel,

Firstly, thank you for your great project, I'm very appreciate that.

As the title, I got an issue when I try to run the test_all.py . The process run well through first 3 modules: 03_vecmul_b_f , 04_dense_a, 06_softmax_a but failed at 09_con2d_a or 12_maxp_a ( --fast mode ). I can't figure out what cause this problem. Did you experienced these errors before ? ( please checked attached file) . Thank you :)

P/s: I tried to remove '09_conv2d_a','12_maxp_a' from test_all.py and the process finished successfully. But it's not a good solution, isn't it ? :)

Hello,
I am using this tool to learn how tensor flow code is converted into verilog and generating hardware circuit. Unfortunately, I am facing some errors in generating verilog file.
I have followed all the steps which was mentioned in readme file. I have successfully install LeFlow with the modified version of TensorFlow and I ran the test_all .py file with no errors. But I get the following error when I run classificationMNIST example

legup@legup-vm:~/Downloads/LeFlow-master/LeFlow-master/examples/classificationMNIST$ ../../src/LeFlow classificationMNIST.py
INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
Extracting ./MNIST_data/train-images-idx3-ubyte.gz
Extracting ./MNIST_data/train-labels-idx1-ubyte.gz
Extracting ./MNIST_data/t10k-images-idx3-ubyte.gz
Extracting ./MNIST_data/t10k-labels-idx1-ubyte.gz
The accuracy over the MNIST data is 92.14%
Expected Result: 6
INFO: Cleaning unused dumped files...
INFO: Converting between LLVM versions...
INFO: Running first batch of optimizations before unrolling...
INFO: Unrolling and Inlining according to user, simplifying elementary branches and optimizing away other values...
INFO: Restructuring the IR signature...
INFO: Rewriting unsupported operations...
INFO: Partitioning arrays...
User did not specify any arrays to partition
INFO: Converting human-readable .ll file to bitcode...
INFO: Starting LegUp Compilation...
ERROR: Legup failed to generate Verilog
INFO: Exiting LeFlow.
It is not generating verilog file. I have seen previous issues related to my problem but I have not been able to fix my error with their solutions.

Could you please suggest any solution to this issue?

Thanks for the help!!!

Hello,
First of all, congratulations for the project.

Can you tell me the best way to see the schematic produced by LeFlow?
I tried to import the files .v into Vivado of your example 06, but the [Synth 8-27] primitive not supported [stratixiv_atom.v] erro appeared.
Is there any better way to view schematics?

Hi, I tried to feed AlexNet to LeFlow.
The generated 1.ll is in the link below.

https://github.com/xzhou40/alexnet_leflow

There are several errors:

1. getelementptr has different syntax for LLVM 7 and LLVM3.5, which is not covered in the downgrade script.
2. After I modified the IR manually to correct getelementptr. Lots of new errors will be created from 4.ll to 5.ll. LeFlow will complain about those error when trying to assemble 7.ll. Error message:

llvm-as: myalexnet_forward_newtf_files/myalexnet_forward_newtf_ir_7.ll:39:20: error: expected value token
@temp0 = global i8*), i8** %temps, align zeroinitializer, align 8
^
Traceback (most recent call last):
File "../../src/LeFlow_from2", line 200, in
run_leflow(args.file_name,tool_path)
File "../../src/LeFlow_from2", line 114, in run_leflow
shutil.move(project_folder+project_name+"_ir_7.bc", project_folder+project_name+".prelto.1.bc")
File "/usr/lib/python2.7/shutil.py", line 302, in move
copy2(src, real_dst)
File "/usr/lib/python2.7/shutil.py", line 130, in copy2
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: 'myalexnet_forward_newtf_files/myalexnet_forward_newtf_ir_7.bc'

Thank you!

Hi,
Hope you're well. I'm using your library and instruction for implementing a deep learning code on Xilinx. I became a luttle confused about your provided codes I'd be so grateful if you could help me. First, could you please let me know how can I install your library? Secondly, #import processMif as mif# line doesn't work, how can I fix that? I tried to change the version of the python, but nothing has changed. Also, after all of steps, how can I access HDL code?

Many thanks for your help in advance.

legup@legup-vm:~/LeFlow/test$ ../src/LeFlow 01_vecmul_a/01_vecmul_a.py
INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
INFO: Cleaning unused dumped files...
Traceback (most recent call last):
File "../src/LeFlow", line 195, in
run_leflow(args.file_name,tool_path)
File "../src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: '01_vecmul_a/01_vecmul_a_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'

@danielholanda Hi danniel，Thank you for sharing such awesome project, I really like it.

But I have some questions.

My code:

import tensorflow as tf
import numpy as np
import sys
sys.path.append('../../src')
import processMif as mif


tf.logging.set_verbosity(tf.logging.INFO)
size=3

in_a = np.array([1,2,3])
in_b = np.array([0,1,2])
mif.createMem([in_a,in_b])

with tf.Session() as sess:
        x = tf.placeholder(tf.float32,[size])
        z = tf.placeholder(tf.float32,[size])
        with tf.device("device:XLA_CPU:0"):
            y=tf.nn.softmax(x*z)
        print in_a
        print in_b
        print y
        result = sess.run(y, {x: in_a, z: in_b})
        print(result)

The result is: [0.00242826 0.01794253 0.9796292 ]

But when I use ModelSim with make v, It return:

# Expect performance to be adversely affected.
# run 7000000000000000ns
# At t=             8470000 clk=1 finish=1 return_val=1051372203
# Cycles:                  421
# ** Note: $finish    : vecmul_max.v(5825)
#    Time: 8470 ns  Iteration: 2  Instance: /main_tb
# End time: 11:53:32 on Sep 17,2019, Elapsed time: 0:00:01
# Errors: 0, Warnings: 1

The return_val is 1051372203, and it's float value is 0.3333333432674408

My question is:

• What is the relationship between the return value of legup and the return value of tensorflow?
• Tensorflow returns an array, but legup only returns one value. Why?
• How to use the legup return val, and how to get the array from the fpga?

Looking forward to your answer, thank you

Hello, how can I solve the issue of No distributions at all found for pip in /usr/lib/python2.7/dist-packages Storing debug log for failure in /home/legup/.pip/pip.log on LegUp as well as

tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl is not a supported wheel on this platform. Storing debug log for failure in /home/legup/.pip/pip.log

All instructions on the front page have been followed, but does not work.
Kindly assist, thank you!

When I run the command:

python test_all.py --fast

It seems like llvm Ir has some problem , here is the terminal output:

Running test for 03_vecmul_b_f
	Generating the circuit...
llvm-as: 03_vecmul_b_f_files/03_vecmul_b_f_ir_2.ll:8:36: error: expected comma after getelementptr's type
  %0 = getelementptr inbounds i8** %params, i64 1
                                   ^
opt: Unknown command line argument '-no-aa'.  Try: 'opt -help'
opt: Did you mean '-cfl-aa'?
opt: Unknown command line argument '-notti'.  Try: 'opt -help'
opt: Did you mean '-tti'?
opt: Unknown command line argument '-no-aa'.  Try: 'opt -help'
opt: Did you mean '-cfl-aa'?
opt: Unknown command line argument '-inline-cost'.  Try: 'opt -help'
opt: Did you mean '-inline'?
llvm-dis: Could not open 03_vecmul_b_f_files/03_vecmul_b_f_ir_3.bc: No such file or directory

llvm-as: 03_vecmul_b_f_files/03_vecmul_b_f_ir_3.ll: error: Could not open input file: No such file or directory
opt: 03_vecmul_b_f_files/03_vecmul_b_f_ir_3.bc: error: Could not open input file: No such file or directory
llvm-dis: Could not open 03_vecmul_b_f_files/03_vecmul_b_f_ir_4.bc: No such file or directory

Traceback (most recent call last):
  File "/home/kc.hsu/LeFlow/src/restructureMainSignature.py", line 189, in <module>
    ir=misc.readIR(input_file)
  File "/home/kc.hsu/LeFlow/src/misc.py", line 111, in readIR
    with open(input_file,'r') as f_in:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/03_vecmul_b_f_ir_4.ll'
Traceback (most recent call last):
  File "/home/kc.hsu/LeFlow/src/restructureOperations.py", line 40, in <module>
    ir=misc.readIR(input_file)
  File "/home/kc.hsu/LeFlow/src/misc.py", line 111, in readIR
    with open(input_file,'r') as f_in:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/03_vecmul_b_f_ir_5.ll'
Traceback (most recent call last):
  File "/home/kc.hsu/LeFlow/src/memBank.py", line 157, in <module>
    ir=misc.readIR(input_file)
  File "/home/kc.hsu/LeFlow/src/misc.py", line 111, in readIR
    with open(input_file,'r') as f_in:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/03_vecmul_b_f_ir_6.ll'
llvm-as: 03_vecmul_b_f_files/03_vecmul_b_f_ir_7.ll: error: Could not open input file: No such file or directory
Traceback (most recent call last):
  File "../../src/LeFlow", line 203, in <module>
    run_leflow(args.file_name,tool_path)
  File "../../src/LeFlow", line 117, in run_leflow
    shutil.move(project_folder+project_name+"_ir_7.bc", project_folder+project_name+".prelto.1.bc")
  File "/usr/lib/python2.7/shutil.py", line 302, in move
    copy2(src, real_dst)
  File "/usr/lib/python2.7/shutil.py", line 130, in copy2
    copyfile(src, dst)
  File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
    with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/03_vecmul_b_f_ir_7.bc'
	Generating new inputs and running Tensorflow with them...
	Testing circuit using Modelsim with new inputs...

Running test for 04_dense_a
Traceback (most recent call last):
  File "test_all.py", line 52, in <module>
    os.chdir("./{}/".format(folder))
OSError: [Errno 2] No such file or directory: './04_dense_a/'

Info: Running Quartus II 64-Bit Analysis & Synthesis
Info: Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
Info: Processing started: Tue Aug 28 06:33:51 2018
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off mnist -c mnist
Warning (20028): Parallel compilation is not licensed and has been disabled
Critical Warning (10191): Verilog HDL Compiler Directive warning at stratixv_pcie_hip_atoms_ncrypt.v(27): text macro "pragma" is undefined
Error (10170): Verilog HDL syntax error at stratixv_pcie_hip_atoms_ncrypt.v(28) near text "protect"; expecting ";"
Error (10170): Verilog HDL syntax error at stratixv_pcie_hip_atoms_ncrypt.v(30) near text "protect"; expecting ";"
Error (10170): Verilog HDL syntax error at stratixv_pcie_hip_atoms_ncrypt.v(33) near text "protect"; expecting ";"
Error (10170): Verilog HDL syntax error at stratixv_pcie_hip_atoms_ncrypt.v(33) near text ")"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_pcie_hip_atoms_ncrypt.v(37): identifier "line_length" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_pcie_hip_atoms_ncrypt.v(37): identifier "bytes" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_pcie_hip_atoms_ncrypt.v(37) near text ")"; expecting ";"
Warning (10259): Verilog HDL error at stratixv_pcie_hip_atoms_ncrypt.v(21033): constant value overflow
Warning (10259): Verilog HDL error at stratixv_pcie_hip_atoms_ncrypt.v(41578): constant value overflow
Warning (10259): Verilog HDL error at stratixv_pcie_hip_atoms_ncrypt.v(51863): constant value overflow
Warning (10259): Verilog HDL error at stratixv_pcie_hip_atoms_ncrypt.v(98647): constant value overflow
Info (12021): Found 0 design units, including 0 entities, in source file stratixv_pcie_hip_atoms_ncrypt.v
Warning (12018): Entity "stratixv_hssi_gen3_pcie_hip" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 1 design units, including 1 entities, in source file stratixv_pcie_hip_atoms.v
Critical Warning (10191): Verilog HDL Compiler Directive warning at stratixv_hssi_atoms_ncrypt.v(27): text macro "pragma" is undefined
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(28): identifier "begin_protected" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_hssi_atoms_ncrypt.v(28) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(30): identifier "encrypt_agent_info" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_hssi_atoms_ncrypt.v(30) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(32): identifier "key_keyname" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(33): identifier "key_method" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_hssi_atoms_ncrypt.v(33) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(33): identifier "line_length" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(33): identifier "bytes" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_hssi_atoms_ncrypt.v(33) near text ")"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(37): identifier "line_length" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_hssi_atoms_ncrypt.v(37): identifier "bytes" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_hssi_atoms_ncrypt.v(37) near text ")"; expecting ";"
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(17474): constant value overflow
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(28564): constant value overflow
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(76875): constant value overflow
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(109657): constant value overflow
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(138601): constant value overflow
Warning (10259): Verilog HDL error at stratixv_hssi_atoms_ncrypt.v(175293): constant value overflow
Info (12021): Found 0 design units, including 0 entities, in source file stratixv_hssi_atoms_ncrypt.v
Warning (12018): Entity "stratixv_channel_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_aux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_avmm_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_10g_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_10g_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_8g_pcs_aggregate" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_8g_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_8g_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_common_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_common_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_gen3_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_gen3_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pipe_gen1_2" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pipe_gen3" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_cdr_att" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_deser_att" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_rx_att" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_rx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_rx_deser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_ser_att" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_tx_att" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_tx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_tx_cgb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_tx_ser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_rx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_rx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_tx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_tx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_refclk_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_cdr_refclk_select_mux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_hssi_pma_lc_refclk_select_mux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_atx_pll" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 33 design units, including 33 entities, in source file stratixv_hssi_atoms.v
Info (12023): Found entity 1: stratixv_hssi_aux_clock_div
Critical Warning (10191): Verilog HDL Compiler Directive warning at stratixv_atoms_ncrypt.v(27): text macro "pragma" is undefined
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(28): identifier "begin_protected" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_atoms_ncrypt.v(28) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(30): identifier "encrypt_agent_info" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_atoms_ncrypt.v(30) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(32): identifier "key_keyname" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(33): identifier "key_method" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_atoms_ncrypt.v(33) near text "protect"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(33): identifier "line_length" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(33): identifier "bytes" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_atoms_ncrypt.v(33) near text ")"; expecting ";"
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(37): identifier "line_length" is already declared in the present scope
Error (10149): Verilog HDL Declaration error at stratixv_atoms_ncrypt.v(37): identifier "bytes" is already declared in the present scope
Error (10170): Verilog HDL syntax error at stratixv_atoms_ncrypt.v(37) near text ")"; expecting ";"
Warning (10259): Verilog HDL error at stratixv_atoms_ncrypt.v(37647): constant value overflow
Warning (10259): Verilog HDL error at stratixv_atoms_ncrypt.v(65259): constant value overflow
Warning (10259): Verilog HDL error at stratixv_atoms_ncrypt.v(68555): constant value overflow
Warning (10259): Verilog HDL error at stratixv_atoms_ncrypt.v(71307): constant value overflow
Info (12021): Found 0 design units, including 0 entities, in source file stratixv_atoms_ncrypt.v
Warning (12018): Entity "stratixv_ff" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_lcell_comb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_ram_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_mlab_cell" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_io_ibuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_io_obuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_ddio_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_ddio_oe" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_ddio_in" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_io_pad" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pseudo_diff_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_bias_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_mac" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_clk_phase_select" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_clkena" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_clkselect" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_dll_offset_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_dll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_dqs_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_dqs_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_dqs_enable_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_duty_cycle_adjustment" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_fractional_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_dll_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_dpa_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_extclk_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_lvds_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_output_counter" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_reconfig" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_pll_refclk_select" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_half_rate_input" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_input_phase_alignment" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_io_clock_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_io_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_leveling_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_lvds_rx" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_lvds_tx" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_output_alignment" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_termination_logic" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_termination" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_asmiblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_chipidblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_controller" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_crcblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_jtag" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_prblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_rublock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_tsdblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_read_fifo" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_read_fifo_read_enable" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_phy_clkbuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixv_oscillator" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 68 design units, including 68 entities, in source file stratixv_atoms.v
Info (12023): Found entity 1: STRATIXV_PRIM_DFFE
Info (12023): Found entity 2: STRATIXV_PRIM_DFFEAS
Info (12023): Found entity 3: STRATIXV_PRIM_DFFEAS_HIGH
Info (12023): Found entity 4: stratixv_dffe
Info (12023): Found entity 5: stratixv_mux21
Info (12023): Found entity 6: stratixv_mux41
Info (12023): Found entity 7: stratixv_and1
Info (12023): Found entity 8: stratixv_and16
Info (12023): Found entity 9: stratixv_bmux21
Info (12023): Found entity 10: stratixv_b17mux21
Info (12023): Found entity 11: stratixv_nmux21
Info (12023): Found entity 12: stratixv_b5mux21
Info (12023): Found entity 13: stratixv_routing_wire
Info (12023): Found entity 14: stratixv_bias_logic
Info (12023): Found entity 15: stratixv_bias_generator
Warning (12018): Entity "stratixiv_hssi_pcie_hip" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 21 design units, including 21 entities, in source file stratixiv_pcie_hip_atoms.v
Info (12023): Found entity 1: stratixiv_pciehip_param
Info (12023): Found entity 2: stratixiv_pciehip_clkmux
Info (12023): Found entity 3: stratixiv_pciehip_dprio_bit
Info (12023): Found entity 4: stratixiv_pciehip_dprio_16bit
Info (12023): Found entity 5: stratixiv_pciehip_dprio_sm
Info (12023): Found entity 6: stratixiv_pciehip_dprio_bus_out_mux
Info (12023): Found entity 7: stratixiv_pciehip_dprio_reg
Info (12023): Found entity 8: stratixiv_pciehip_dprio_reg_top
Info (12023): Found entity 9: stratixiv_pciehip_hip_dprio_top
Info (12023): Found entity 10: stratixiv_pciehip_compute_bit
Info (12023): Found entity 11: stratixiv_pciehip_ecc_gen
Info (12023): Found entity 12: stratixiv_pciehip_ecc_chk
Info (12023): Found entity 13: stratixiv_pciehip_ecc_decoder
Info (12023): Found entity 14: stratixiv_pciehip_pulse_ext
Info (12023): Found entity 15: stratixiv_pciehip_hip_mram
Info (12023): Found entity 16: stratixiv_pciehip_mram_top
Info (12023): Found entity 17: stratixiv_pciehip_pciexp_dcfiforam
Info (12023): Found entity 18: stratixiv_pciehip_pciexp_dcram_rtry
Info (12023): Found entity 19: stratixiv_pciehip_pciexp_dcram_rxvc
Info (12023): Found entity 20: stratixiv_pciehip_hip_top
Warning (12018): Entity "stratixiv_hssi_clock_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_tx_pma" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_rx_pma" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_cmu" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_calibration_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_hssi_refclk_divider" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 90 design units, including 90 entities, in source file stratixiv_hssi_atoms.v
Info (12023): Found entity 1: stratixiv_hssi_aux_clock_div
Info (12023): Found entity 2: stratixiv_hssi_aux_clock_mult
Info (12023): Found entity 3: stratixiv_hssi_pma_c_divby2q
Info (12023): Found entity 4: stratixiv_hssi_pma_c_controller_4t16
Info (12023): Found entity 5: stratixiv_hssi_pma_c_clkgendrv
Info (12023): Found entity 6: stratixiv_hssi_pma_c_clkgenbuf
Info (12023): Found entity 7: stratixiv_hssi_pma_c_clkgenbuf_cmu
Info (12023): Found entity 8: stratixiv_hssi_pma_c_d2a_mbpass
Info (12023): Found entity 9: stratixiv_hssi_pma_c_tx_clkmux_cmu
Info (12023): Found entity 10: stratixiv_hssi_pma_c_deser_pcie
Info (12023): Found entity 11: stratixiv_hssi_pma_c_deser_10to20
Info (12023): Found entity 12: stratixiv_hssi_pma_c_deser_ff_chain
Info (12023): Found entity 13: stratixiv_hssi_pma_c_deser_fsd_rst
Info (12023): Found entity 14: stratixiv_hssi_pma_c_deser
Info (12023): Found entity 15: stratixiv_hssi_pma_c_div4or5_mcnt
Info (12023): Found entity 16: stratixiv_hssi_pma_c_lockdet_tx18
Info (12023): Found entity 17: stratixiv_hssi_pma_c_pfd
Info (12023): Found entity 18: stratixiv_hssi_pma_c_rlpbk_ctrl
Info (12023): Found entity 19: stratixiv_hssi_pma_c_rlpbk_mux
Info (12023): Found entity 20: stratixiv_hssi_pma_c_rx
Info (12023): Found entity 21: stratixiv_hssi_pma_c_ser_20to10
Info (12023): Found entity 22: stratixiv_hssi_pma_c_ser
Info (12023): Found entity 23: stratixiv_hssi_pma_c_sdl_en_2x
Info (12023): Found entity 24: stratixiv_hssi_pma_c_rcv_detect_div_by_2
Info (12023): Found entity 25: stratixiv_hssi_pma_c_rcv_detect_clk_gen
Info (12023): Found entity 26: stratixiv_hssi_pma_c_rcv_detect_sync
Info (12023): Found entity 27: stratixiv_hssi_pma_c_rcv_detect_fsm
Info (12023): Found entity 28: stratixiv_hssi_pma_c_rcv_detect_control
Info (12023): Found entity 29: stratixiv_hssi_pma_c_rcv_det_digital
Info (12023): Found entity 30: stratixiv_hssi_pma_c_rcv_detect
Info (12023): Found entity 31: stratixiv_hssi_pma_c_tx
Info (12023): Found entity 32: stratixiv_hssi_pma_ppmdetect
Info (12023): Found entity 33: stratixiv_hssi_pma_c_ser_10g
Info (12023): Found entity 34: stratixiv_hssi_pma_c_deser_10g
Info (12023): Found entity 35: stratixiv_hssi_pma_c_pcie_sw
Info (12023): Found entity 36: stratixiv_hssi_pma_c_clkgendrv_tx10g
Info (12023): Found entity 37: stratixiv_hssi_pma_c_clkgenbuf_tx10g
Info (12023): Found entity 38: stratixiv_hssi_pcs_reset
Info (12023): Found entity 39: stratixiv_hssi_digi_chnl_hip_spt
Info (12023): Found entity 40: stratixiv_hssi_phystatus_generator_fsm
Info (12023): Found entity 41: stratixiv_hssi_q_pipe_interface_top
Info (12023): Found entity 42: stratixiv_hssi_tx_digis_txclk_gating
Info (12023): Found entity 43: stratixiv_hssi_tx_digi_txclk_ctl
Info (12023): Found entity 44: stratixiv_hssi_tx_digis_ram8x49_syn
Info (12023): Found entity 45: stratixiv_hssi_tx_digis_ph_fifo
Info (12023): Found entity 46: stratixiv_hssi_tx_digi_tx_ctrl
Info (12023): Found entity 47: stratixiv_hssi_tx_digi
Info (12023): Found entity 48: stratixiv_hssi_rx_digis_ph_fifo
Info (12023): Found entity 49: stratixiv_hssi_rx_digis_ram16x14_syn
Info (12023): Found entity 50: stratixiv_hssi_rx_digis_ram20x16_syn
Info (12023): Found entity 51: stratixiv_hssi_rx_digis_ram8x70_syn
Info (12023): Found entity 52: stratixiv_hssi_rx_digis_rxclk_gating
Info (12023): Found entity 53: stratixiv_hssi_rx_digi_rxclk_ctl
Info (12023): Found entity 54: stratixiv_hssi_rx_digi_rx_ctrl
Info (12023): Found entity 55: stratixiv_hssi_rx_digi
Info (12023): Found entity 56: stratixiv_hssi_cmu_chnl_reset
Info (12023): Found entity 57: stratixiv_hssi_cmu_quad_reset
Info (12023): Found entity 58: stratixiv_hssi_cmu_auto_speed_neg
Info (12023): Found entity 59: stratixiv_hssi_cmu_clk_gating
Info (12023): Found entity 60: stratixiv_hssi_cmu_clk_ctl
Info (12023): Found entity 61: stratixiv_hssi_cmu_rx_ctrl
Info (12023): Found entity 62: stratixiv_hssi_cmu_rxclk_gating
Info (12023): Found entity 63: stratixiv_hssi_cmu_rxclk_ctl
Info (12023): Found entity 64: stratixiv_hssi_cmu_tx_ctrl
Info (12023): Found entity 65: stratixiv_hssi_cmu_txclk_gating
Info (12023): Found entity 66: stratixiv_hssi_cmu_txclk_ctl
Info (12023): Found entity 67: stratixiv_hssi_cmu_dprio_bit
Info (12023): Found entity 68: stratixiv_hssi_cmu_dprio_bit_pma
Info (12023): Found entity 69: stratixiv_hssi_cmu_dprio_16bit
Info (12023): Found entity 70: stratixiv_hssi_cmu_dprio_16bit_pma
Info (12023): Found entity 71: stratixiv_hssi_cmu_dprio_reg_chnl
Info (12023): Found entity 72: stratixiv_hssi_cmu_dprio_chnl_bus_out_mux
Info (12023): Found entity 73: stratixiv_hssi_cmu_dprio_chnl_top
Info (12023): Found entity 74: stratixiv_hssi_cmu_dprio_status
Info (12023): Found entity 75: stratixiv_hssi_cmu_dprio_sm
Info (12023): Found entity 76: stratixiv_hssi_cmu_dprio_reg_centrl
Info (12023): Found entity 77: stratixiv_hssi_cmu_dprio_centrl_bus_out_mux
Info (12023): Found entity 78: stratixiv_hssi_cmu_dprio_centrl_top
Info (12023): Found entity 79: stratixiv_hssi_cmu_dprio_map_index
Info (12023): Found entity 80: stratixiv_hssi_cmu_dprio_map
Info (12023): Found entity 81: stratixiv_hssi_cmu_dprio_top
Warning (12018): Entity "stratixiv_jtag" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_crcblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_lcell_comb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_lvds_transmitter" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_rublock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_ram_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_ff" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_clkselect" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_clkena" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_mlab_cell" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_io_ibuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_io_obuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_ddio_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_ddio_oe" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_ddio_in" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_mac_mult" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_mac_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dll_offset_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dqs_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dqs_enable" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dqs_enable_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_io_clock_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_output_phase_alignment" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_input_phase_alignment" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_half_rate_input" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_io_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_dqs_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_termination" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_termination_logic" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_io_pad" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_asmiblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_tsdblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_lvds_receiver" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_pseudo_diff_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "stratixiv_bias_block" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 90 design units, including 90 entities, in source file stratixiv_atoms.v
Info (12023): Found entity 1: STRATIXIV_PRIM_DFFE
Info (12023): Found entity 2: STRATIXIV_PRIM_DFFEAS
Info (12023): Found entity 3: STRATIXIV_PRIM_DFFEAS_HIGH
Info (12023): Found entity 4: stratixiv_dffe
Info (12023): Found entity 5: stratixiv_mux21
Info (12023): Found entity 6: stratixiv_mux41
Info (12023): Found entity 7: stratixiv_and1
Info (12023): Found entity 8: stratixiv_and16
Info (12023): Found entity 9: stratixiv_bmux21
Info (12023): Found entity 10: stratixiv_b17mux21
Info (12023): Found entity 11: stratixiv_nmux21
Info (12023): Found entity 12: stratixiv_b5mux21
Info (12023): Found entity 13: stratixiv_routing_wire
Info (12023): Found entity 14: stratixiv_lvds_tx_reg
Info (12023): Found entity 15: stratixiv_lvds_tx_parallel_register
Info (12023): Found entity 16: stratixiv_lvds_tx_out_block
Info (12023): Found entity 17: stratixiv_ram_pulse_generator
Info (12023): Found entity 18: stratixiv_ram_register
Info (12023): Found entity 19: stratixiv_and2
Info (12023): Found entity 20: stratixiv_ena_reg
Info (12023): Found entity 21: stratixiv_mlab_cell_pulse_generator
Info (12023): Found entity 22: stratixiv_mac_register
Info (12023): Found entity 23: stratixiv_mac_multiplier
Info (12023): Found entity 24: stratixiv_fsa_isse
Info (12023): Found entity 25: stratixiv_first_stage_add_sub
Info (12023): Found entity 26: stratixiv_second_stage_add_accum
Info (12023): Found entity 27: stratixiv_round_block
Info (12023): Found entity 28: stratixiv_saturate_block
Info (12023): Found entity 29: stratixiv_round_saturate_block
Info (12023): Found entity 30: stratixiv_rotate_shift_block
Info (12023): Found entity 31: stratixiv_carry_chain_adder
Info (12023): Found entity 32: stratixiv_ddr_gray_decoder
Info (12023): Found entity 33: stratixiv_ddr_delay_chain_s
Info (12023): Found entity 34: stratixiv_ddr_io_reg
Info (12023): Found entity 35: stratixiv_rt_sm
Info (12023): Found entity 36: stratixiv_termination_aux_clock_div
Info (12023): Found entity 37: stratixiv_m_cntr
Info (12023): Found entity 38: stratixiv_n_cntr
Info (12023): Found entity 39: stratixiv_scale_cntr
Info (12023): Found entity 40: stratixiv_pll_reg
Info (12023): Found entity 41: stratixiv_lvds_rx_fifo_sync_ram
Info (12023): Found entity 42: stratixiv_lvds_rx_fifo
Info (12023): Found entity 43: stratixiv_lvds_rx_bitslip
Info (12023): Found entity 44: stratixiv_lvds_rx_deser
Info (12023): Found entity 45: stratixiv_lvds_rx_parallel_reg
Info (12023): Found entity 46: stratixiv_lvds_reg
Info (12023): Found entity 47: stratixiv_pclk_divider
Info (12023): Found entity 48: stratixiv_select_ini_phase_dpaclk
Info (12023): Found entity 49: stratixiv_dpa_retime_block
Info (12023): Found entity 50: stratixiv_dpa_block
Info (12023): Found entity 51: stratixiv_bias_logic
Info (12023): Found entity 52: stratixiv_bias_generator
Info (12021): Found 19 design units, including 19 entities, in source file sgate.v
Info (12023): Found entity 1: oper_add
Info (12023): Found entity 2: oper_addsub
Info (12023): Found entity 3: mux21
Info (12023): Found entity 4: io_buf_tri
Info (12023): Found entity 5: io_buf_opdrn
Info (12023): Found entity 6: oper_mult
Info (12023): Found entity 7: tri_bus
Info (12023): Found entity 8: oper_div
Info (12023): Found entity 9: oper_mod
Info (12023): Found entity 10: oper_left_shift
Info (12023): Found entity 11: oper_right_shift
Info (12023): Found entity 12: oper_rotate_left
Info (12023): Found entity 13: oper_rotate_right
Info (12023): Found entity 14: oper_less_than
Info (12023): Found entity 15: oper_mux
Info (12023): Found entity 16: oper_selector
Info (12023): Found entity 17: oper_decoder
Info (12023): Found entity 18: oper_bus_mux
Info (12023): Found entity 19: oper_latch
Warning (12018): Entity "arriav_hd_altpe2_hip_top" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 1 design units, including 1 entities, in source file cyclonev_pcie_hip_atoms.v
Warning (12018): Entity "cyclonev_hssi_8g_pcs_aggregate" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_8g_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_8g_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_common_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_common_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pipe_gen1_2" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_aux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_int" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_rx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_rx_deser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_tx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_tx_cgb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_tx_ser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_pma_cdr_refclk_select_mux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_rx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_rx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_tx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_tx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_refclk_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_aux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_channel_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hssi_avmm_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_8g_pcs_aggregate" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_8g_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_8g_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_common_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_common_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pipe_gen1_2" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_aux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_int" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_rx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_rx_deser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_tx_buf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_tx_cgb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_tx_ser" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_pma_cdr_refclk_select_mux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_rx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_rx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_tx_pcs_pma_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_tx_pld_pcs_interface" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_refclk_divider" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_pll_aux" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_channel_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "arriav_hssi_avmm_interface" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 48 design units, including 48 entities, in source file cyclonev_hssi_atoms.v
Info (12023): Found entity 1: cyclonev_hssi_pma_hi_pmaif
Info (12023): Found entity 2: cyclonev_hssi_pma_hi_xcvrif
Info (12023): Found entity 3: arriav_hssi_pma_hi_pmaif
Info (12023): Found entity 4: arriav_hssi_pma_hi_xcvrif
Warning (12018): Entity "cyclonev_hps_interface_hps2fpga" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 1 design units, including 1 entities, in source file cyclonev_hps_atoms.sv
Warning (12018): Entity "cyclonev_ff" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_lcell_comb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_ram_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_mlab_cell" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_io_ibuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_io_obuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_ddio_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_ddio_oe" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_ddio_in" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_io_pad" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pseudo_diff_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_bias_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_clk_phase_select" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_clkena" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_clkselect" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_dll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_dqs_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_dqs_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_dqs_enable_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_fractional_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_io_config" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_leveling_delay_chain" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_dll_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_dpa_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_extclk_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_lvds_output" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_output_counter" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_reconfig" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_pll_refclk_select" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_termination_logic" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_termination" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_asmiblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_chipidblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_controller" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_crcblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_jtag" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_prblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_rublock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_phy_clkbuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_ir_fifo_userdes" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_read_fifo_read_clock_select" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_lfifo" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_vfifo" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_mac" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_mem_phy" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_oscillator" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cyclonev_hps_interface_fpga2sdram" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 71 design units, including 71 entities, in source file cyclonev_atoms.v
Info (12023): Found entity 1: CYCLONEV_PRIM_DFFE
Info (12023): Found entity 2: CYCLONEV_PRIM_DFFEAS
Info (12023): Found entity 3: CYCLONEV_PRIM_DFFEAS_HIGH
Info (12023): Found entity 4: cyclonev_dffe
Info (12023): Found entity 5: cyclonev_mux21
Info (12023): Found entity 6: cyclonev_mux41
Info (12023): Found entity 7: cyclonev_and1
Info (12023): Found entity 8: cyclonev_and16
Info (12023): Found entity 9: cyclonev_bmux21
Info (12023): Found entity 10: cyclonev_b17mux21
Info (12023): Found entity 11: cyclonev_nmux21
Info (12023): Found entity 12: cyclonev_b5mux21
Info (12023): Found entity 13: cyclonev_routing_wire
Info (12023): Found entity 14: cyclonev_bias_logic
Info (12023): Found entity 15: cyclonev_bias_generator
Info (12023): Found entity 16: cyclonev_dll_offset_ctrl
Info (12023): Found entity 17: cyclonev_duty_cycle_adjustment
Info (12023): Found entity 18: cyclonev_half_rate_input
Info (12023): Found entity 19: cyclonev_input_phase_alignment
Info (12023): Found entity 20: cyclonev_io_clock_divider
Info (12023): Found entity 21: cyclonev_tsdblock
Info (12023): Found entity 22: cyclonev_read_fifo
Info (12023): Found entity 23: cyclonev_read_fifo_read_enable
Warning (12018): Entity "cycloneiv_hssi_pcie_hip" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 21 design units, including 21 entities, in source file cycloneiv_pcie_hip_atoms.v
Info (12023): Found entity 1: cycloneiv_pciehip_param
Info (12023): Found entity 2: cycloneiv_pciehip_clkmux
Info (12023): Found entity 3: cycloneiv_pciehip_dprio_bit
Info (12023): Found entity 4: cycloneiv_pciehip_dprio_16bit
Info (12023): Found entity 5: cycloneiv_pciehip_dprio_sm
Info (12023): Found entity 6: cycloneiv_pciehip_dprio_bus_out_mux
Info (12023): Found entity 7: cycloneiv_pciehip_dprio_reg
Info (12023): Found entity 8: cycloneiv_pciehip_dprio_reg_top
Info (12023): Found entity 9: cycloneiv_pciehip_hip_dprio_top
Info (12023): Found entity 10: cycloneiv_pciehip_compute_bit
Info (12023): Found entity 11: cycloneiv_pciehip_ecc_gen
Info (12023): Found entity 12: cycloneiv_pciehip_ecc_chk
Info (12023): Found entity 13: cycloneiv_pciehip_ecc_decoder
Info (12023): Found entity 14: cycloneiv_pciehip_pulse_ext
Info (12023): Found entity 15: cycloneiv_pciehip_hip_mram
Info (12023): Found entity 16: cycloneiv_pciehip_mram_top
Info (12023): Found entity 17: cycloneiv_pciehip_pciexp_dcfiforam
Info (12023): Found entity 18: cycloneiv_pciehip_pciexp_dcram_rtry
Info (12023): Found entity 19: cycloneiv_pciehip_pciexp_dcram_rxvc
Info (12023): Found entity 20: cycloneiv_pciehip_hip_top
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(922): overriding existing definition for macro "reserved_0_TB30_TXPMA_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 5875
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(923): overriding existing definition for macro "reserved_0_TB30_TXPMA_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 5876
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(924): overriding existing definition for macro "reserved_0_TB30_TXPMA_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 5877
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(1737): overriding existing definition for macro "reserved_0_TB43_RXPMA_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 7132
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(1797): overriding existing definition for macro "reserved_0_TB47_RXPMA_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 7211
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18732): overriding existing definition for macro "reserved_0_TB40_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80699
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18733): overriding existing definition for macro "reserved_0_TB40_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80700
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18734): overriding existing definition for macro "rcru_iselpd_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80701
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18735): overriding existing definition for macro "rcru_iselpd_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80702
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18736): overriding existing definition for macro "rcru_iselpd_DP_PLL_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 80703
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18737): overriding existing definition for macro "rcru_isel_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80704
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18738): overriding existing definition for macro "rcru_isel_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80705
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18739): overriding existing definition for macro "rcru_isel_DP_PLL_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 80706
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18740): overriding existing definition for macro "rcru_testdnen_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80707
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18741): overriding existing definition for macro "rcru_testupen_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80708
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18742): overriding existing definition for macro "rcru_testen_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80709
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18743): overriding existing definition for macro "rcru_lst_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80710
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18744): overriding existing definition for macro "rcru_lst_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80711
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18745): overriding existing definition for macro "rcru_lst_DP_PLL_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 80712
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18746): overriding existing definition for macro "rcru_lst_DP_PLL_IDX_3", which was defined in "stratixiv_hssi_atoms.v", line 80713
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18747): overriding existing definition for macro "rcru_rlbk_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80714
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18750): overriding existing definition for macro "rcru_rgla_isel_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80717
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18751): overriding existing definition for macro "rcru_rgla_isel_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80718
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18752): overriding existing definition for macro "rcru_rgla_isel_DP_PLL_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 80719
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18753): overriding existing definition for macro "rcru_pdof_test_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80720
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18754): overriding existing definition for macro "rcru_pdof_test_DP_PLL_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 80721
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18755): overriding existing definition for macro "rcru_pdof_test_DP_PLL_IDX_2", which was defined in "stratixiv_hssi_atoms.v", line 80722
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18756): overriding existing definition for macro "rcru_pdfl_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80723
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18757): overriding existing definition for macro "rcru_sd_sel_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80724
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18758): overriding existing definition for macro "reserved_0_TB41_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80725
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18759): overriding existing definition for macro "rcru_ignore_phslck_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80726
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18760): overriding existing definition for macro "rcru_cmu_mode_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80727
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18761): overriding existing definition for macro "rrx_cru_rst_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80728
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18762): overriding existing definition for macro "rrx_cru_pdb_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80729
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18763): overriding existing definition for macro "rltr_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80730
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18764): overriding existing definition for macro "rltd_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80731
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(18765): overriding existing definition for macro "rcp_mode_DP_PLL_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 80732
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58073): overriding existing definition for macro "rindv_rx_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58789
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58074): overriding existing definition for macro "rdwidth_rx_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58801
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58075): overriding existing definition for macro "rtx_idle_delay_RX_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 58802
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58076): overriding existing definition for macro "rtx_idle_delay_RX_IDX_1", which was defined in "stratixiv_hssi_atoms.v", line 58803
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58077): overriding existing definition for macro "rclkcmppos_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58804
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58078): overriding existing definition for macro "rppmsel_RX_IDX_0", which was defined in "stratixiv_hssi_atoms.v", line 58805
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58079): overriding existing definition for macro "rppmsel_RX_IDX_5", which was defined in "stratixiv_hssi_atoms.v", line 58806
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58080): overriding existing definition for macro "rforce0_freqdet_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58807
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58081): overriding existing definition for macro "rforce1_freqdet_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58808
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58082): overriding existing definition for macro "rs_lpbk_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58809
Warning (10274): Verilog HDL macro warning at cycloneiv_hssi_atoms.v(58083): overriding existing definition for macro "rrx_revlb_sw_RX_IDX", which was defined in "stratixiv_hssi_atoms.v", line 58810
Warning (12018): Entity "cycloneiv_hssi_tx_pma" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_hssi_rx_pma" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_hssi_tx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_hssi_rx_pcs" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_hssi_cmu" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_hssi_calibration_block" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 63 design units, including 63 entities, in source file cycloneiv_hssi_atoms.v
Info (12023): Found entity 1: cycloneiv_hssi_tx_pma_sub_reg
Info (12023): Found entity 2: cycloneiv_hssi_tx_pma_sub_out_block
Info (12023): Found entity 3: cycloneiv_hssi_tx_pma_sub_parallel_register
Info (12023): Found entity 4: cycloneiv_hssi_tx_pma_sub_ser
Info (12023): Found entity 5: cycloneiv_hssi_tx_pma_sub_tx_rx_det_div_by_2
Info (12023): Found entity 6: cycloneiv_hssi_tx_pma_sub_tx_rx_det_clk_gen
Info (12023): Found entity 7: cycloneiv_hssi_tx_pma_sub_tx_rx_det_rcv_det_sync
Info (12023): Found entity 8: cycloneiv_hssi_tx_pma_sub_tx_rx_det_rcv_det_fsm
Info (12023): Found entity 9: cycloneiv_hssi_tx_pma_sub_tx_rx_det_rcv_det_control
Info (12023): Found entity 10: cycloneiv_hssi_tx_pma_sub_tx_rx_det_rcv_det_digital
Info (12023): Found entity 11: cycloneiv_hssi_tx_pma_sub_tx_rx_det
Info (12023): Found entity 12: cycloneiv_hssi_rx_pma_sub_deser
Info (12023): Found entity 13: cycloneiv_hssi_rx_pma_sub_clkdiv
Info (12023): Found entity 14: cycloneiv_hssi_pcs_reset
Info (12023): Found entity 15: cycloneiv_hssi_digi_chnl_hip_spt
Info (12023): Found entity 16: cycloneiv_hssi_phystatus_generator_fsm
Info (12023): Found entity 17: cycloneiv_hssi_q_pipe_interface_top
Info (12023): Found entity 18: cycloneiv_hssi_tx_digis_txclk_gating
Info (12023): Found entity 19: cycloneiv_hssi_tx_digi_txclk_ctl
Info (12023): Found entity 20: cycloneiv_hssi_tx_digis_ram8x49_syn
Info (12023): Found entity 21: cycloneiv_hssi_tx_digis_ph_fifo
Info (12023): Found entity 22: cycloneiv_hssi_tx_digi_tx_ctrl
Info (12023): Found entity 23: cycloneiv_hssi_tx_digi
Info (12023): Found entity 24: cycloneiv_hssi_cmu_dprio_map
Info (12023): Found entity 25: cycloneiv_hssi_cmu_dprio_top
Info (12023): Found entity 26: cycloneiv_hssi_rx_digis_ph_fifo
Info (12023): Found entity 27: cycloneiv_hssi_rx_digis_ram16x14_syn
Info (12023): Found entity 28: cycloneiv_hssi_rx_digis_ram20x16_syn
Info (12023): Found entity 29: cycloneiv_hssi_rx_digis_ram8x70_syn
Info (12023): Found entity 30: cycloneiv_hssi_rx_digis_rxclk_gating
Info (12023): Found entity 31: cycloneiv_hssi_rx_digi_rxclk_ctl
Info (12023): Found entity 32: cycloneiv_hssi_rx_digi_rx_ctrl
Info (12023): Found entity 33: cycloneiv_hssi_rx_digi
Info (12023): Found entity 34: cycloneiv_hssi_cmu_chnl_reset
Info (12023): Found entity 35: cycloneiv_hssi_cmu_quad_reset
Info (12023): Found entity 36: cycloneiv_hssi_cmu_auto_speed_neg
Info (12023): Found entity 37: cycloneiv_hssi_cmu_clk_gating
Info (12023): Found entity 38: cycloneiv_hssi_cmu_clk_ctl
Info (12023): Found entity 39: cycloneiv_hssi_cmu_rx_ctrl
Info (12023): Found entity 40: cycloneiv_hssi_cmu_rxclk_gating
Info (12023): Found entity 41: cycloneiv_hssi_cmu_rxclk_ctl
Info (12023): Found entity 42: cycloneiv_hssi_cmu_tx_ctrl
Info (12023): Found entity 43: cycloneiv_hssi_cmu_txclk_gating
Info (12023): Found entity 44: cycloneiv_hssi_cmu_txclk_ctl
Info (12023): Found entity 45: cycloneiv_hssi_cmu_dprio_bit
Info (12023): Found entity 46: cycloneiv_hssi_cmu_dprio_bit_pma
Info (12023): Found entity 47: cycloneiv_hssi_cmu_dprio_16bit
Info (12023): Found entity 48: cycloneiv_hssi_cmu_dprio_16bit_pma
Info (12023): Found entity 49: cycloneiv_hssi_cmu_dprio_reg_chnl
Info (12023): Found entity 50: cycloneiv_hssi_cmu_dprio_chnl_bus_out_mux
Info (12023): Found entity 51: cycloneiv_hssi_cmu_dprio_chnl_top
Info (12023): Found entity 52: cycloneiv_hssi_cmu_dprio_status
Info (12023): Found entity 53: cycloneiv_hssi_cmu_dprio_sm
Info (12023): Found entity 54: cycloneiv_hssi_cmu_dprio_reg_centrl
Info (12023): Found entity 55: cycloneiv_hssi_cmu_dprio_centrl_bus_out_mux
Info (12023): Found entity 56: cycloneiv_hssi_cmu_dprio_centrl_top
Info (12023): Found entity 57: cycloneiv_hssi_cmu_dprio_map_index
Warning (12018): Entity "cycloneiv_lcell_comb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_io_ibuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_io_obuf" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_ddio_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_ddio_oe" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_ff" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_ram_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_mac_mult" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_mac_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_io_pad" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_clkctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_pseudo_diff_out" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_rublock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_termination" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_jtag" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_crcblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_oscillator" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_controller" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneiv_pll" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 46 design units, including 46 entities, in source file cycloneiv_atoms.v
Info (12023): Found entity 1: CYCLONEIV_PRIM_DFFE
Info (12023): Found entity 2: CYCLONEIV_PRIM_DFFEAS
Info (12023): Found entity 3: CYCLONEIV_PRIM_DFFEAS_HIGH
Info (12023): Found entity 4: cycloneiv_dffe
Info (12023): Found entity 5: cycloneiv_mux21
Info (12023): Found entity 6: cycloneiv_mux41
Info (12023): Found entity 7: cycloneiv_and1
Info (12023): Found entity 8: cycloneiv_and16
Info (12023): Found entity 9: cycloneiv_bmux21
Info (12023): Found entity 10: cycloneiv_b17mux21
Info (12023): Found entity 11: cycloneiv_nmux21
Info (12023): Found entity 12: cycloneiv_b5mux21
Info (12023): Found entity 13: cycloneiv_latch
Info (12023): Found entity 14: cycloneiv_routing_wire
Info (12023): Found entity 15: cycloneiv_ram_pulse_generator
Info (12023): Found entity 16: cycloneiv_ram_register
Info (12023): Found entity 17: cycloneiv_mac_data_reg
Info (12023): Found entity 18: cycloneiv_mac_sign_reg
Info (12023): Found entity 19: cycloneiv_mac_mult_internal
Info (12023): Found entity 20: cycloneiv_ena_reg
Info (12023): Found entity 21: cycloneiv_termination_ctrl
Info (12023): Found entity 22: cycloneiv_termination_rupdn
Info (12023): Found entity 23: cycloneiv_m_cntr
Info (12023): Found entity 24: cycloneiv_n_cntr
Info (12023): Found entity 25: cycloneiv_scale_cntr
Info (12023): Found entity 26: cycloneiv_post_divider
Info (12023): Found entity 27: cycloneiv_pll_reg
Warning (12018): Entity "cycloneii_ram_block" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_jtag" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_crcblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_asmiblock" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_lcell_ff" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_lcell_comb" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_io" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_clk_delay_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_clk_delay_cal_ctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_clkctrl" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_mac_mult" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "cycloneii_mac_out" will be ignored because it conflicts with Quartus II primitive name
Info (12021): Found 38 design units, including 38 entities, in source file cycloneii_atoms.v
Info (12023): Found entity 1: CYCLONEII_PRIM_DFFE
Info (12023): Found entity 2: CYCLONEII_PRIM_DFFEAS
Info (12023): Found entity 3: CYCLONEII_PRIM_DFFEAS_HIGH
Info (12023): Found entity 4: cycloneii_dffe
Info (12023): Found entity 5: cycloneii_latch
Info (12023): Found entity 6: cycloneii_mux21
Info (12023): Found entity 7: cycloneii_mux41
Info (12023): Found entity 8: cycloneii_and1
Info (12023): Found entity 9: cycloneii_and16
Info (12023): Found entity 10: cycloneii_bmux21
Info (12023): Found entity 11: cycloneii_b17mux21
Info (12023): Found entity 12: cycloneii_nmux21
Info (12023): Found entity 13: cycloneii_b5mux21
Info (12023): Found entity 14: cycloneii_ram_pulse_generator
Info (12023): Found entity 15: cycloneii_ram_register
Info (12023): Found entity 16: cycloneii_m_cntr
Info (12023): Found entity 17: cycloneii_n_cntr
Info (12023): Found entity 18: cycloneii_scale_cntr
Info (12023): Found entity 19: cycloneii_pll_reg
Info (12023): Found entity 20: cycloneii_routing_wire
Info (12023): Found entity 21: cycloneii_asynch_io
Info (12023): Found entity 22: cycloneii_ena_reg
Info (12023): Found entity 23: cycloneii_mac_data_reg
Info (12023): Found entity 24: cycloneii_mac_sign_reg
Info (12023): Found entity 25: cycloneii_mac_mult_internal
Info (12021): Found 11 design units, including 11 entities, in source file classificationMNIST.v
Info (12023): Found entity 1: top
Info (12023): Found entity 2: memory_controller
Info (12023): Found entity 3: main
Info (12023): Found entity 4: ram_dual_port
Info (12023): Found entity 5: rom_dual_port
Info (12023): Found entity 6: ML605
Info (12023): Found entity 7: de4
Info (12023): Found entity 8: de2
Info (12023): Found entity 9: circuit_start_control
Info (12023): Found entity 10: hex_digits
Info (12023): Found entity 11: main_tb
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_truncate_3.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_truncate_3.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_truncate_3.v
Info (12023): Found entity 1: altfp_truncate_altfp_convert_bpn
Info (12023): Found entity 2: altfp_truncate_3
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_subtractor_14.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_subtractor_14.v for elaboration
Info (12021): Found 22 design units, including 22 entities, in source file db/altfp_subtractor_14.v
Info (12023): Found entity 1: altfp_subtractor_14_altbarrel_shift_ltd
Info (12023): Found entity 2: altfp_subtractor_14_altbarrel_shift_s0g
Info (12023): Found entity 3: altfp_subtractor_14_altpriority_encoder_3e8
Info (12023): Found entity 4: altfp_subtractor_14_altpriority_encoder_6e8
Info (12023): Found entity 5: altfp_subtractor_14_altpriority_encoder_be8
Info (12023): Found entity 6: altfp_subtractor_14_altpriority_encoder_3v7
Info (12023): Found entity 7: altfp_subtractor_14_altpriority_encoder_6v7
Info (12023): Found entity 8: altfp_subtractor_14_altpriority_encoder_bv7
Info (12023): Found entity 9: altfp_subtractor_14_altpriority_encoder_uv8
Info (12023): Found entity 10: altfp_subtractor_14_altpriority_encoder_ue9
Info (12023): Found entity 11: altfp_subtractor_14_altpriority_encoder_ou8
Info (12023): Found entity 12: altfp_subtractor_14_altpriority_encoder_nh8
Info (12023): Found entity 13: altfp_subtractor_14_altpriority_encoder_qh8
Info (12023): Found entity 14: altfp_subtractor_14_altpriority_encoder_2h9
Info (12023): Found entity 15: altfp_subtractor_14_altpriority_encoder_d6b
Info (12023): Found entity 16: altfp_subtractor_14_altpriority_encoder_n28
Info (12023): Found entity 17: altfp_subtractor_14_altpriority_encoder_q28
Info (12023): Found entity 18: altfp_subtractor_14_altpriority_encoder_229
Info (12023): Found entity 19: altfp_subtractor_14_altpriority_encoder_ena
Info (12023): Found entity 20: altfp_subtractor_14_altpriority_encoder_dna
Info (12023): Found entity 21: altfp_subtractor_altfp_add_sub_enj
Info (12023): Found entity 22: altfp_subtractor_14
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_subtractor64_14.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_subtractor64_14.v for elaboration
Info (12021): Found 26 design units, including 26 entities, in source file db/altfp_subtractor64_14.v
Info (12023): Found entity 1: altfp_subtractor64_14_altbarrel_shift_otd
Info (12023): Found entity 2: altfp_subtractor64_14_altbarrel_shift_u0g
Info (12023): Found entity 3: altfp_subtractor64_14_altpriority_encoder_3e8
Info (12023): Found entity 4: altfp_subtractor64_14_altpriority_encoder_6e8
Info (12023): Found entity 5: altfp_subtractor64_14_altpriority_encoder_be8
Info (12023): Found entity 6: altfp_subtractor64_14_altpriority_encoder_rf8
Info (12023): Found entity 7: altfp_subtractor64_14_altpriority_encoder_3v7
Info (12023): Found entity 8: altfp_subtractor64_14_altpriority_encoder_6v7
Info (12023): Found entity 9: altfp_subtractor64_14_altpriority_encoder_bv7
Info (12023): Found entity 10: altfp_subtractor64_14_altpriority_encoder_r08
Info (12023): Found entity 11: altfp_subtractor64_14_altpriority_encoder_tv8
Info (12023): Found entity 12: altfp_subtractor64_14_altpriority_encoder_te9
Info (12023): Found entity 13: altfp_subtractor64_14_altpriority_encoder_uu8
Info (12023): Found entity 14: altfp_subtractor64_14_altpriority_encoder_nh8
Info (12023): Found entity 15: altfp_subtractor64_14_altpriority_encoder_qh8
Info (12023): Found entity 16: altfp_subtractor64_14_altpriority_encoder_vh8
Info (12023): Found entity 17: altfp_subtractor64_14_altpriority_encoder_fj8
Info (12023): Found entity 18: altfp_subtractor64_14_altpriority_encoder_hi9
Info (12023): Found entity 19: altfp_subtractor64_14_altpriority_encoder_n28
Info (12023): Found entity 20: altfp_subtractor64_14_altpriority_encoder_q28
Info (12023): Found entity 21: altfp_subtractor64_14_altpriority_encoder_v28
Info (12023): Found entity 22: altfp_subtractor64_14_altpriority_encoder_f48
Info (12023): Found entity 23: altfp_subtractor64_14_altpriority_encoder_h39
Info (12023): Found entity 24: altfp_subtractor64_14_altpriority_encoder_ina
Info (12023): Found entity 25: altfp_subtractor64_altfp_add_sub_qoj
Info (12023): Found entity 26: altfp_subtractor64_14
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_sitofp64_6.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_sitofp64_6.v for elaboration
Info (12021): Found 12 design units, including 12 entities, in source file db/altfp_sitofp64_6.v
Info (12023): Found entity 1: altfp_sitofp64_6_altbarrel_shift_fof
Info (12023): Found entity 2: altfp_sitofp64_6_altpriority_encoder_3v7
Info (12023): Found entity 3: altfp_sitofp64_6_altpriority_encoder_3e8
Info (12023): Found entity 4: altfp_sitofp64_6_altpriority_encoder_6v7
Info (12023): Found entity 5: altfp_sitofp64_6_altpriority_encoder_6e8
Info (12023): Found entity 6: altfp_sitofp64_6_altpriority_encoder_bv7
Info (12023): Found entity 7: altfp_sitofp64_6_altpriority_encoder_be8
Info (12023): Found entity 8: altfp_sitofp64_6_altpriority_encoder_r08
Info (12023): Found entity 9: altfp_sitofp64_6_altpriority_encoder_rf8
Info (12023): Found entity 10: altfp_sitofp64_6_altpriority_encoder_qb6
Info (12023): Found entity 11: altfp_sitofp64_altfp_convert_0jn
Info (12023): Found entity 12: altfp_sitofp64_6
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_sitofp32_6.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_sitofp32_6.v for elaboration
Info (12021): Found 12 design units, including 12 entities, in source file db/altfp_sitofp32_6.v
Info (12023): Found entity 1: altfp_sitofp32_6_altbarrel_shift_fof
Info (12023): Found entity 2: altfp_sitofp32_6_altpriority_encoder_3e8
Info (12023): Found entity 3: altfp_sitofp32_6_altpriority_encoder_6e8
Info (12023): Found entity 4: altfp_sitofp32_6_altpriority_encoder_be8
Info (12023): Found entity 5: altfp_sitofp32_6_altpriority_encoder_rf8
Info (12023): Found entity 6: altfp_sitofp32_6_altpriority_encoder_3v7
Info (12023): Found entity 7: altfp_sitofp32_6_altpriority_encoder_6v7
Info (12023): Found entity 8: altfp_sitofp32_6_altpriority_encoder_bv7
Info (12023): Found entity 9: altfp_sitofp32_6_altpriority_encoder_r08
Info (12023): Found entity 10: altfp_sitofp32_6_altpriority_encoder_qb6
Info (12023): Found entity 11: altfp_sitofp32_altfp_convert_fhn
Info (12023): Found entity 12: altfp_sitofp32_6
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_multiplier_11.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_multiplier_11.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_multiplier_11.v
Info (12023): Found entity 1: altfp_multiplier_altfp_mult_4do
Info (12023): Found entity 2: altfp_multiplier_11
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_multiplier64_11.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_multiplier64_11.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_multiplier64_11.v
Info (12023): Found entity 1: altfp_multiplier64_altfp_mult_geo
Info (12023): Found entity 2: altfp_multiplier64_11
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_fptosi64_6.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_fptosi64_6.v for elaboration
Info (12021): Found 3 design units, including 3 entities, in source file db/altfp_fptosi64_6.v
Info (12023): Found entity 1: altfp_fptosi64_6_altbarrel_shift_nof
Info (12023): Found entity 2: altfp_fptosi64_altfp_convert_0jn
Info (12023): Found entity 3: altfp_fptosi64_6
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_fptosi32_6.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_fptosi32_6.v for elaboration
Info (12021): Found 3 design units, including 3 entities, in source file db/altfp_fptosi32_6.v
Info (12023): Found entity 1: altfp_fptosi32_6_altbarrel_shift_kof
Info (12023): Found entity 2: altfp_fptosi32_altfp_convert_fhn
Info (12023): Found entity 3: altfp_fptosi32_6
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_extend_2.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_extend_2.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_extend_2.v
Info (12023): Found entity 1: altfp_extend_altfp_convert_bpn
Info (12023): Found entity 2: altfp_extend_2
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_divider_33.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_divider_33.v for elaboration
Info (12021): Found 14 design units, including 14 entities, in source file db/altfp_divider_33.v
Info (12023): Found entity 1: altfp_divider_33_altfp_div_csa_gvc
Info (12023): Found entity 2: altfp_divider_33_altfp_div_csa_72c
Info (12023): Found entity 3: altfp_divider_33_altfp_div_csa_j0f
Info (12023): Found entity 4: altfp_divider_33_altfp_div_csa_c3c
Info (12023): Found entity 5: altfp_divider_33_altfp_div_csa_a2c
Info (12023): Found entity 6: altfp_divider_33_altfp_div_csa_b3c
Info (12023): Found entity 7: altfp_divider_33_qds_block_7o8
Info (12023): Found entity 8: altfp_divider_33_srt_block_int_6ck
Info (12023): Found entity 9: altfp_divider_33_qds_block_6a7
Info (12023): Found entity 10: altfp_divider_33_srt_block_int_eek
Info (12023): Found entity 11: altfp_divider_33_srt_block_int_l8k
Info (12023): Found entity 12: altfp_divider_33_altfp_div_srt_ext_b0f
Info (12023): Found entity 13: altfp_divider_altfp_div_kth
Info (12023): Found entity 14: altfp_divider_33
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_divider64_61.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_divider64_61.v for elaboration
Info (12021): Found 13 design units, including 13 entities, in source file db/altfp_divider64_61.v
Info (12023): Found entity 1: altfp_divider64_61_altfp_div_csa_ivc
Info (12023): Found entity 2: altfp_divider64_61_altfp_div_csa_92c
Info (12023): Found entity 3: altfp_divider64_61_altfp_div_csa_k0f
Info (12023): Found entity 4: altfp_divider64_61_altfp_div_csa_d3c
Info (12023): Found entity 5: altfp_divider64_61_altfp_div_csa_c2c
Info (12023): Found entity 6: altfp_divider64_61_qds_block_7o8
Info (12023): Found entity 7: altfp_divider64_61_srt_block_int_cck
Info (12023): Found entity 8: altfp_divider64_61_qds_block_6a7
Info (12023): Found entity 9: altfp_divider64_61_srt_block_int_kek
Info (12023): Found entity 10: altfp_divider64_61_srt_block_int_r8k
Info (12023): Found entity 11: altfp_divider64_61_altfp_div_srt_ext_i0f
Info (12023): Found entity 12: altfp_divider64_altfp_div_1vh
Info (12023): Found entity 13: altfp_divider64_61
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_compare64_1.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_compare64_1.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_compare64_1.v
Info (12023): Found entity 1: altfp_compare64_altfp_compare_1me
Info (12023): Found entity 2: altfp_compare64_1
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_compare32_1.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_compare32_1.v for elaboration
Info (12021): Found 2 design units, including 2 entities, in source file db/altfp_compare32_1.v
Info (12023): Found entity 1: altfp_compare32_altfp_compare_lke
Info (12023): Found entity 2: altfp_compare32_1
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_adder_14.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_adder_14.v for elaboration
Info (12021): Found 22 design units, including 22 entities, in source file db/altfp_adder_14.v
Info (12023): Found entity 1: altfp_adder_14_altbarrel_shift_ltd
Info (12023): Found entity 2: altfp_adder_14_altbarrel_shift_s0g
Info (12023): Found entity 3: altfp_adder_14_altpriority_encoder_3e8
Info (12023): Found entity 4: altfp_adder_14_altpriority_encoder_6e8
Info (12023): Found entity 5: altfp_adder_14_altpriority_encoder_be8
Info (12023): Found entity 6: altfp_adder_14_altpriority_encoder_3v7
Info (12023): Found entity 7: altfp_adder_14_altpriority_encoder_6v7
Info (12023): Found entity 8: altfp_adder_14_altpriority_encoder_bv7
Info (12023): Found entity 9: altfp_adder_14_altpriority_encoder_uv8
Info (12023): Found entity 10: altfp_adder_14_altpriority_encoder_ue9
Info (12023): Found entity 11: altfp_adder_14_altpriority_encoder_ou8
Info (12023): Found entity 12: altfp_adder_14_altpriority_encoder_nh8
Info (12023): Found entity 13: altfp_adder_14_altpriority_encoder_qh8
Info (12023): Found entity 14: altfp_adder_14_altpriority_encoder_2h9
Info (12023): Found entity 15: altfp_adder_14_altpriority_encoder_d6b
Info (12023): Found entity 16: altfp_adder_14_altpriority_encoder_n28
Info (12023): Found entity 17: altfp_adder_14_altpriority_encoder_q28
Info (12023): Found entity 18: altfp_adder_14_altpriority_encoder_229
Info (12023): Found entity 19: altfp_adder_14_altpriority_encoder_ena
Info (12023): Found entity 20: altfp_adder_14_altpriority_encoder_dna
Info (12023): Found entity 21: altfp_adder_altfp_add_sub_dmj
Info (12023): Found entity 22: altfp_adder_14
Info (12021): Found 23 design units, including 23 entities, in source file altfp_adder_13.v
Info (12023): Found entity 1: altfp_adder_13
Info (12023): Found entity 2: fadd_altbarrel_shift_02e
Info (12023): Found entity 3: fadd_altbarrel_shift_65g
Info (12023): Found entity 4: fadd_altpriority_encoder_3e8
Info (12023): Found entity 5: fadd_altpriority_encoder_6e8
Info (12023): Found entity 6: fadd_altpriority_encoder_be8
Info (12023): Found entity 7: fadd_altpriority_encoder_3v7
Info (12023): Found entity 8: fadd_altpriority_encoder_6v7
Info (12023): Found entity 9: fadd_altpriority_encoder_bv7
Info (12023): Found entity 10: fadd_altpriority_encoder_uv8
Info (12023): Found entity 11: fadd_altpriority_encoder_ue9
Info (12023): Found entity 12: fadd_altpriority_encoder_ou8
Info (12023): Found entity 13: fadd_altpriority_encoder_nh8
Info (12023): Found entity 14: fadd_altpriority_encoder_qh8
Info (12023): Found entity 15: fadd_altpriority_encoder_vh8
Info (12023): Found entity 16: fadd_altpriority_encoder_ii9
Info (12023): Found entity 17: fadd_altpriority_encoder_n28
Info (12023): Found entity 18: fadd_altpriority_encoder_q28
Info (12023): Found entity 19: fadd_altpriority_encoder_v28
Info (12023): Found entity 20: fadd_altpriority_encoder_i39
Info (12023): Found entity 21: fadd_altpriority_encoder_cna
Info (12023): Found entity 22: fadd_altfp_add_sub_a0l
Info (12023): Found entity 23: fadd
Warning (12136): Clear box output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/altfp_adder64_14.v is not compatible with the current compile. Used regenerated output file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/db/altfp_adder64_14.v for elaboration
Info (12021): Found 26 design units, including 26 entities, in source file db/altfp_adder64_14.v
Info (12023): Found entity 1: altfp_adder64_14_altbarrel_shift_otd
Info (12023): Found entity 2: altfp_adder64_14_altbarrel_shift_u0g
Info (12023): Found entity 3: altfp_adder64_14_altpriority_encoder_3e8
Info (12023): Found entity 4: altfp_adder64_14_altpriority_encoder_6e8
Info (12023): Found entity 5: altfp_adder64_14_altpriority_encoder_be8
Info (12023): Found entity 6: altfp_adder64_14_altpriority_encoder_rf8
Info (12023): Found entity 7: altfp_adder64_14_altpriority_encoder_3v7
Info (12023): Found entity 8: altfp_adder64_14_altpriority_encoder_6v7
Info (12023): Found entity 9: altfp_adder64_14_altpriority_encoder_bv7
Info (12023): Found entity 10: altfp_adder64_14_altpriority_encoder_r08
Info (12023): Found entity 11: altfp_adder64_14_altpriority_encoder_tv8
Info (12023): Found entity 12: altfp_adder64_14_altpriority_encoder_te9
Info (12023): Found entity 13: altfp_adder64_14_altpriority_encoder_uu8
Info (12023): Found entity 14: altfp_adder64_14_altpriority_encoder_nh8
Info (12023): Found entity 15: altfp_adder64_14_altpriority_encoder_qh8
Info (12023): Found entity 16: altfp_adder64_14_altpriority_encoder_vh8
Info (12023): Found entity 17: altfp_adder64_14_altpriority_encoder_fj8
Info (12023): Found entity 18: altfp_adder64_14_altpriority_encoder_hi9
Info (12023): Found entity 19: altfp_adder64_14_altpriority_encoder_n28
Info (12023): Found entity 20: altfp_adder64_14_altpriority_encoder_q28
Info (12023): Found entity 21: altfp_adder64_14_altpriority_encoder_v28
Info (12023): Found entity 22: altfp_adder64_14_altpriority_encoder_f48
Info (12023): Found entity 23: altfp_adder64_14_altpriority_encoder_h39
Info (12023): Found entity 24: altfp_adder64_14_altpriority_encoder_ina
Info (12023): Found entity 25: altfp_adder64_altfp_add_sub_pnj
Info (12023): Found entity 26: altfp_adder64_14
Info (12021): Found 27 design units, including 27 entities, in source file altfp_adder64_13.v
Info (12023): Found entity 1: altfp_adder64_13
Info (12023): Found entity 2: fadd64_altbarrel_shift_32e
Info (12023): Found entity 3: fadd64_altbarrel_shift_95g
Info (12023): Found entity 4: fadd64_altpriority_encoder_3e8
Info (12023): Found entity 5: fadd64_altpriority_encoder_6e8
Info (12023): Found entity 6: fadd64_altpriority_encoder_be8
Info (12023): Found entity 7: fadd64_altpriority_encoder_rf8
Info (12023): Found entity 8: fadd64_altpriority_encoder_3v7
Info (12023): Found entity 9: fadd64_altpriority_encoder_6v7
Info (12023): Found entity 10: fadd64_altpriority_encoder_bv7
Info (12023): Found entity 11: fadd64_altpriority_encoder_r08
Info (12023): Found entity 12: fadd64_altpriority_encoder_tv8
Info (12023): Found entity 13: fadd64_altpriority_encoder_te9
Info (12023): Found entity 14: fadd64_altpriority_encoder_uu8
Info (12023): Found entity 15: fadd64_altpriority_encoder_nh8
Info (12023): Found entity 16: fadd64_altpriority_encoder_qh8
Info (12023): Found entity 17: fadd64_altpriority_encoder_vh8
Info (12023): Found entity 18: fadd64_altpriority_encoder_fj8
Info (12023): Found entity 19: fadd64_altpriority_encoder_hi9
Info (12023): Found entity 20: fadd64_altpriority_encoder_n28
Info (12023): Found entity 21: fadd64_altpriority_encoder_q28
Info (12023): Found entity 22: fadd64_altpriority_encoder_v28
Info (12023): Found entity 23: fadd64_altpriority_encoder_f48
Info (12023): Found entity 24: fadd64_altpriority_encoder_h39
Info (12023): Found entity 25: fadd64_altpriority_encoder_ina
Info (12023): Found entity 26: fadd64_altfp_add_sub_m1l
Info (12023): Found entity 27: fadd64
Critical Warning (10191): Verilog HDL Compiler Directive warning at altera_primitives.v(34): text macro "begin_keywords" is undefined
Error (10170): Verilog HDL syntax error at altera_primitives.v(34) near text ""1364-1995"; expecting a description
Error (10187): Verilog HDL syntax error at altera_primitives.v(34): unexpected end of file in If Statement
Info (12021): Found 0 design units, including 0 entities, in source file altera_primitives.v
Warning (10261): Verilog HDL Event Control warning at altera_mf.v(4982): Event Control contains a complex event expression
Warning (10261): Verilog HDL Event Control warning at altera_mf.v(5017): Event Control contains a complex event expression
Warning (12018): Entity "lcell" will be ignored because it conflicts with Quartus II primitive name
Warning (12090): Entity "altpll" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altlvds_rx" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altlvds_tx" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "dcfifo_mixed_widths" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "dcfifo" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altaccumulate" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altmult_accum" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altmult_add" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altfp_mult" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altsqrt" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altclklock" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altddio_in" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altddio_out" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altddio_bidir" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altdpram" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altsyncram" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt3pram" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "parallel_add" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "scfifo" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altshift_taps" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "a_graycounter" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altsquare" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_std_synchronizer" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_std_synchronizer_bundle" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_cal" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_cal_mm" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_cal_c3gxb" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_cal_sv" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_cal_av" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_aeq_s4" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_eyemon" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "alt_dfe" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "sld_virtual_jtag" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "sld_signaltap" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altstratixii_oct" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altparallel_flash_loader" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altserial_flash_loader" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "sld_virtual_jtag_basic" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Warning (12090): Entity "altsource_probe" obtained from "altera_mf.v" instead of from Quartus II megafunction library
Info (12021): Found 86 design units, including 86 entities, in source file altera_mf.v
Info (12023): Found entity 1: ALTERA_MF_MEMORY_INITIALIZATION
Info (12023): Found entity 2: ALTERA_MF_HINT_EVALUATION
Info (12023): Found entity 3: ALTERA_DEVICE_FAMILIES
Info (12023): Found entity 4: dffp
Info (12023): Found entity 5: pll_iobuf
Info (12023): Found entity 6: stx_m_cntr
Info (12023): Found entity 7: stx_n_cntr
Info (12023): Found entity 8: stx_scale_cntr
Info (12023): Found entity 9: MF_pll_reg
Info (12023): Found entity 10: MF_stratix_pll
Info (12023): Found entity 11: arm_m_cntr
Info (12023): Found entity 12: arm_n_cntr
Info (12023): Found entity 13: arm_scale_cntr
Info (12023): Found entity 14: MF_stratixii_pll
Info (12023): Found entity 15: ttn_m_cntr
Info (12023): Found entity 16: ttn_n_cntr
Info (12023): Found entity 17: ttn_scale_cntr
Info (12023): Found entity 18: MF_stratixiii_pll
Info (12023): Found entity 19: cda_m_cntr
Info (12023): Found entity 20: cda_n_cntr
Info (12023): Found entity 21: cda_scale_cntr
Info (12023): Found entity 22: MF_cycloneiii_pll
Info (12023): Found entity 23: MF_cycloneiiigl_m_cntr
Info (12023): Found entity 24: MF_cycloneiiigl_n_cntr
Info (12023): Found entity 25: MF_cycloneiiigl_scale_cntr
Info (12023): Found entity 26: cycloneiiigl_post_divider
Info (12023): Found entity 27: MF_cycloneiiigl_pll
Info (12023): Found entity 28: altpll
Info (12023): Found entity 29: altlvds_rx
Info (12023): Found entity 30: stratix_lvds_rx
Info (12023): Found entity 31: stratixgx_dpa_lvds_rx
Info (12023): Found entity 32: stratixii_lvds_rx
Info (12023): Found entity 33: flexible_lvds_rx
Info (12023): Found entity 34: stratixiii_lvds_rx
Info (12023): Found entity 35: stratixiii_lvds_rx_channel
Info (12023): Found entity 36: stratixiii_lvds_rx_dpa
Info (12023): Found entity 37: altlvds_tx
Info (12023): Found entity 38: stratixv_local_clk_divider
Info (12023): Found entity 39: stratix_tx_outclk
Info (12023): Found entity 40: stratixii_tx_outclk
Info (12023): Found entity 41: flexible_lvds_tx
Info (12023): Found entity 42: dcfifo_dffpipe
Info (12023): Found entity 43: dcfifo_fefifo
Info (12023): Found entity 44: dcfifo_async
Info (12023): Found entity 45: dcfifo_sync
Info (12023): Found entity 46: dcfifo_low_latency
Info (12023): Found entity 47: dcfifo_mixed_widths
Info (12023): Found entity 48: dcfifo
Info (12023): Found entity 49: altaccumulate
Info (12023): Found entity 50: altmult_accum
Info (12023): Found entity 51: altmult_add
Info (12023): Found entity 52: altfp_mult
Info (12023): Found entity 53: altsqrt
Info (12023): Found entity 54: altclklock
Info (12023): Found entity 55: altddio_in
Info (12023): Found entity 56: altddio_out
Info (12023): Found entity 57: altddio_bidir
Info (12023): Found entity 58: altdpram
Info (12023): Found entity 59: altsyncram
Info (12023): Found entity 60: alt3pram
Info (12023): Found entity 61: parallel_add
Info (12023): Found entity 62: scfifo
Info (12023): Found entity 63: altshift_taps
Info (12023): Found entity 64: a_graycounter
Info (12023): Found entity 65: altsquare
Info (12023): Found entity 66: altera_std_synchronizer
Info (12023): Found entity 67: altera_std_synchronizer_bundle
Info (12023): Found entity 68: alt_cal
Info (12023): Found entity 69: alt_cal_mm
Info (12023): Found entity 70: alt_cal_c3gxb
Info (12023): Found entity 71: alt_cal_sv
Info (12023): Found entity 72: alt_cal_av
Info (12023): Found entity 73: alt_aeq_s4
Info (12023): Found entity 74: alt_eyemon
Info (12023): Found entity 75: alt_dfe
Info (12023): Found entity 76: signal_gen
Info (12023): Found entity 77: jtag_tap_controller
Info (12023): Found entity 78: dummy_hub
Info (12023): Found entity 79: sld_virtual_jtag
Info (12023): Found entity 80: sld_signaltap
Info (12023): Found entity 81: altstratixii_oct
Info (12023): Found entity 82: altparallel_flash_loader
Info (12023): Found entity 83: altserial_flash_loader
Info (12023): Found entity 84: sld_virtual_jtag_basic
Info (12023): Found entity 85: altsource_probe
Warning (12090): Entity "altera_pll" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_stratixv_pll" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_arriav_pll" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_arriavgz_pll" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_cyclonev_pll" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12018): Entity "generic_pll" will be ignored because it conflicts with Quartus II primitive name
Warning (12018): Entity "generic_mux" will be ignored because it conflicts with Quartus II primitive name
Warning (12090): Entity "altera_mult_add" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Warning (12090): Entity "altera_mult_add_rtl" obtained from "altera_lnsim.sv" instead of from Quartus II megafunction library
Info (12021): Found 41 design units, including 39 entities, in source file altera_lnsim.sv
Info (12022): Found design unit 1: altera_lnsim_functions (SystemVerilog)
Info (12022): Found design unit 2: altera_generic_pll_functions (SystemVerilog)
Info (12023): Found entity 1: altera_pll
Info (12023): Found entity 2: dps_extra_kick
Info (12023): Found entity 3: dprio_init
Info (12023): Found entity 4: pll_dps_lcell_comb
Info (12023): Found entity 5: altera_stratixv_pll
Info (12023): Found entity 6: altera_arriav_pll
Info (12023): Found entity 7: altera_arriavgz_pll
Info (12023): Found entity 8: altera_cyclonev_pll
Info (12023): Found entity 9: generic_cdr
Info (12023): Found entity 10: common_28nm_ram_pulse_generator
Info (12023): Found entity 11: common_28nm_ram_register
Info (12023): Found entity 12: common_28nm_ram_block
Info (12023): Found entity 13: generic_m20k
Info (12023): Found entity 14: generic_m10k
Info (12023): Found entity 15: common_28nm_mlab_cell_pulse_generator
Info (12023): Found entity 16: common_28nm_mlab_latch
Info (12023): Found entity 17: common_28nm_mlab_cell_core
Info (12023): Found entity 18: common_porta_latches
Info (12023): Found entity 19: generic_28nm_hp_mlab_cell_impl
Info (12023): Found entity 20: common_porta_registers
Info (12023): Found entity 21: generic_28nm_lc_mlab_cell_impl
Info (12023): Found entity 22: generic_device_pll
Info (12023): Found entity 23: altera_mult_add
Info (12023): Found entity 24: altera_mult_add_rtl
Info (12023): Found entity 25: ama_signed_extension_function
Info (12023): Found entity 26: ama_dynamic_signed_function
Info (12023): Found entity 27: ama_register_function
Info (12023): Found entity 28: ama_register_with_ext_function
Info (12023): Found entity 29: ama_data_split_reg_ext_function
Info (12023): Found entity 30: ama_coef_reg_ext_function
Info (12023): Found entity 31: ama_adder_function
Info (12023): Found entity 32: ama_multiplier_function
Info (12023): Found entity 33: ama_preadder_function
Info (12023): Found entity 34: ama_accumulator_function
Info (12023): Found entity 35: ama_systolic_adder_function
Info (12023): Found entity 36: ama_scanchain
Info (12023): Found entity 37: altera_pll_reconfig_tasks
Warning (12090): Entity "lpm_constant" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_inv" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_and" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_or" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_xor" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_bustri" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_mux" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_decode" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_clshift" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_add_sub" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_compare" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_mult" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_divide" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_abs" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_counter" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_latch" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_ff" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_shiftreg" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_ram_dq" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_ram_dp" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_ram_io" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_rom" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_fifo" obtained from "220model.v" instead of from Quartus II megafunction library
Warning (12090): Entity "lpm_fifo_dc" obtained from "220model.v" instead of from Quartus II megafunction library
Info (12021): Found 33 design units, including 33 entities, in source file 220model.v
Info (12023): Found entity 1: LPM_MEMORY_INITIALIZATION
Info (12023): Found entity 2: LPM_HINT_EVALUATION
Info (12023): Found entity 3: LPM_DEVICE_FAMILIES
Info (12023): Found entity 4: lpm_constant
Info (12023): Found entity 5: lpm_inv
Info (12023): Found entity 6: lpm_and
Info (12023): Found entity 7: lpm_or
Info (12023): Found entity 8: lpm_xor
Info (12023): Found entity 9: lpm_bustri
Info (12023): Found entity 10: lpm_mux
Info (12023): Found entity 11: lpm_decode
Info (12023): Found entity 12: lpm_clshift
Info (12023): Found entity 13: lpm_add_sub
Info (12023): Found entity 14: lpm_compare
Info (12023): Found entity 15: lpm_mult
Info (12023): Found entity 16: lpm_divide
Info (12023): Found entity 17: lpm_abs
Info (12023): Found entity 18: lpm_counter
Info (12023): Found entity 19: lpm_latch
Info (12023): Found entity 20: lpm_ff
Info (12023): Found entity 21: lpm_shiftreg
Info (12023): Found entity 22: lpm_ram_dq
Info (12023): Found entity 23: lpm_ram_dp
Info (12023): Found entity 24: lpm_ram_io
Info (12023): Found entity 25: lpm_rom
Info (12023): Found entity 26: lpm_fifo
Info (12023): Found entity 27: lpm_fifo_dc_dffpipe
Info (12023): Found entity 28: lpm_fifo_dc_fefifo
Info (12023): Found entity 29: lpm_fifo_dc_async
Info (12023): Found entity 30: lpm_fifo_dc
Info (12023): Found entity 31: lpm_inpad
Info (12023): Found entity 32: lpm_outpad
Info (12023): Found entity 33: lpm_bipad
Info (144001): Generated suppressed messages file /home/legup/LeFlow/examples/classificationMNIST/classificationMNIST_files/output_files/mnist.map.smsg
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 35 errors, 425 warnings
Error: Peak virtual memory: 1325 megabytes
Error: Processing ended: Tue Aug 28 06:34:10 2018
Error: Elapsed time: 00:00:19
Error: Total CPU time (on all processors): 00:00:16
Error (293001): Quartus II Flow was unsuccessful. 37 errors, 425 warnings

I'm using quartus provided by legup machine

Hi Daniel,

I was able to run LeFlow correctly and hardware was synthesized for the DE1-SoC card. That was quite interesting. Now I am trying to understand how to integrate this hardware with other types of inputs to achieve results like those of your demo. I can notice that there is a module dedicated to memory control and another dedicated to the processing of the operation, however I still can not understand how I can make it work with own data coming from other inputs.

It would be possible for you to give me a route or some suggestion to understand or achieve it, that would be very helpful for me.

Thank you very much for this tool, I have been looking for something similar and what you did is just fantastic.

Hi,

I would like to run the tests one by one but somsing went side ways:

legup@legup-vm:~/Downloads/LeFlow-master/test/01_vecmul_a$ ~/Downloads/LeFlow-master/src/LeFlow 01_vecmul_a.py
INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
INFO: Cleaning unused dumped files...
Traceback (most recent call last):
File "/home/legup/Downloads/LeFlow-master/src/LeFlow", line 195, in
run_leflow(args.file_name,tool_path)
File "/home/legup/Downloads/LeFlow-master/src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: '01_vecmul_a_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'

I am using the legup virtual box
and did chmod +x Leflow.

If you can give me any suggestion where i messed up that would be great thanks!

When I tried to run test all after installation, I am getting following error:-

Traceback (most recent call last):
File "../../src/LeFlow", line 200, in
run_leflow(args.file_name,tool_path)
File "../../src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'
Generating new inputs and running Tensorflow with them...
Testing circuit using Modelsim with new inputs...
/home/legup/legup-4.0/examples//../llvm/Release+Asserts/bin/llvm-dis: Could not open 03_vecmul_b_f.prelto.1.bc: No such file or directory

make[1]: *** [all] Error 1
make: *** [03_vecmul_b_f.v] Error 2
Traceback (most recent call last):
File "test_all.py", line 92, in
modelsim_result = np.array(mif.getModelsimMem(folder+"_files/memory_dump.txt"))
File "../src/processMif.py", line 77, in getModelsimMem
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/memory_dump.txt'

I am looking to implement an edge ML inferencing accelerator for the raspi. I am wondering if it is possible to use leflow to compile a TensorFlow graph to run on the spartan 6 FPGA. I am not sure where to start and I am wondering if this would be possible within leflow

Hi Daniel,

Thank you for the wonderful and interesting project. Been planning to work on this project for the summer.
I had a few issues with the installation for TensorFlow 1.6.0

Tried using the following command to install from the wheel file provided in /src/tensorflow.

sudo pip install tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl --ignore-installed six

However, I was getting the following error or warning:

Installing collected packages: termcolor, six, setuptools, protobuf,
werkzeug, numpy, html5lib, bleach, futures, wheel, markdown,
tensorboard, enum34, absl-py, gast, funcsigs, mock, astor, grpcio,
backports.weakref, tensorflow
Successfully installed absl-py-0.9.0 astor-0.8.1
backports.weakref-1.0.post1 bleach-1.5.0 enum34-1.1.10 funcsigs-1.0.2
futures-3.3.0 gast-0.3.3 grpcio-1.29.0 html5lib-0.9999999
markdown-3.1.1 mock-3.0.5 numpy-1.16.6 protobuf-3.12.2
setuptools-44.1.1 six-1.15.0 tensorboard-1.6.0 tensorflow-1.6.0
termcolor-1.1.0 werkzeug-1.0.1 wheel-0.34.2
/usr/local/lib/python2.7/dist-packages/pip/_vendor/urllib3/util/ssl_.py:139:
InsecurePlatformWarning: A true SSLContext object is not available.
This prevents urllib3 from configuring SSL appropriately and may cause
certain SSL connections to fail. You can upgrade to a newer version of
Python to solve this. For more information, see
https://urllib3.readthedocs.io/en/latest/advanced-usage.html#ssl-warnings
  InsecurePlatformWarning,

I assumed it was a warning so I went ahead with the testing. I was also successful in testing the installation by running.

python test_all.py --fast

All tests yielded correct results. I tried generating hardware for classificationMNIST and it also gave me all the desired outputs.

So I then tried to generate the hardware for convolutionLenna and it gave me the following error:

INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
INFO: Cleaning unused dumped files...
Traceback (most recent call last):
  File "../../src/LeFlow", line 200, in <module>
    run_leflow(args.file_name,tool_path)
  File "../../src/LeFlow", line 79, in run_leflow
    shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
  File "/usr/lib/python2.7/shutil.py", line 119, in copy
    copyfile(src, dst)
  File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
    with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory:
'convolutionLe_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'
legup@legup-vm:~/LeFlow/examples/convolutionLenna$ ../../src/LeFlow
convolutionLenna.py

Is there a problem with the installation of TensorFlow? I looked into the other issues that were having the same problem but I wasn't able to pinpoint my problem. Any help on this would be highly appreciated.

P.S. I tried the old version of TensorFlow mentioned in a few of the issues too but got the same result. I also looked into similar issues online and there were a couple which I tried and failed like installing pyOpenSSL ndg-httpsclient pyasn1. I also tried re-installing the requests package but gave the same issues while installing TensorFlow. There was one other option of installing python 2.7.9 but haven't tried it yet.

Hi, had you tried new LegUP (6.5) with LeFlow? I want use LeFlow on Xilinx board, what I know, that "commercialized" LegUP (https://www.legupcomputing.com) works on any FPGA.

Hi @danielholanda, your project is great. I have complied success all your examples. But when I tried to build my owm simple CNN (I follow your instruction in the other answer), I met ERROR: Legup failed to generate Verilog.
This is my code

import tensorflow as tf
import numpy as np
import sys
import matplotlib.image as mpimg
sys.path.append('../../src')

import processMif as mif

def rand(dim):
return np.random.random(dim).astype(np.float32)

X = tf.placeholder(tf.float32, [1, 227, 227, 3])
img=mpimg.imread('test.png')
img_1 = np.resize(img, (227,227,3))
test_image = np.reshape(img_1,[1,227,227,3])

conv1_w = tf.Variable(rand([3, 3, 3, 32]))
conv1_b = tf.Variable(rand([32]))

conv2_w = tf.Variable(rand([3, 3, 32, 32]))
conv2_b = tf.Variable(rand([32]))

conv3_w = tf.Variable(rand([3, 3, 32, 64]))
conv3_b = tf.Variable(rand([64]))

fc1_w = tf.Variable(rand([282864, 128]))
fc1_b = tf.Variable(tf.constant(0.05, shape=[128]))

fc2_w = tf.Variable(rand([128, 2]))
fc2_b = tf.Variable(tf.constant(0.05, shape=[2]))

with tf.Session() as sess:
with tf.device("device:XLA_CPU:0"):

    #Conv1
    conv1 = tf.nn.relu(tf.add(tf.nn.conv2d(X, conv1_w, strides=[1,1,1,1], padding='SAME'), conv1_b))

    #Maxpool1
    maxp1 = tf.layers.max_pooling2d(inputs=conv1, pool_size=[2,2], strides=2)

    #Conv2
    conv2 = tf.nn.relu(tf.add(tf.nn.conv2d(maxp1, conv2_w, strides=[1,1,1,1], padding='SAME'), conv2_b)) 

    #Maxpool2
    maxp2 = tf.layers.max_pooling2d(inputs=conv2, pool_size=[2,2], strides=2)

    #Conv3
    conv3 = tf.nn.relu(tf.add(tf.nn.conv2d(maxp2, conv3_w, strides=[1,1,1,1], padding='SAME'), conv3_b))

    #Maxpool3
    maxp3 = tf.layers.max_pooling2d(inputs=conv3, pool_size=[2,2], strides=2)

    #Flatten
    maxp3_reshaped = maxp3.get_shape()
    num_features = maxp3_reshaped[1:4].num_elements()
    layers = tf.reshape(maxp3, [-1, num_features])
   

    #Fc1
    fc1 = tf.nn.relu(tf.matmul(layers, fc1_w) + fc1_b)

    #Fc2
    fc2 = tf.matmul(fc1, fc2_w) + fc2_b

    y_pred = tf.nn.softmax(fc2, name='y_pred')
    # y_pred_cls = tf.argmax(y_pred, dimension=1)

sess.run(tf.global_variables_initializer())
result = sess.run(y_pred,{X: test_image})

print("Ket qua:"+str(result))

Could you help me fix this. Hope to hear from you soon. Thank you.

Hello,

I am trying to do this command line
sudo pip install tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl --ignore-installed six

but I keep getting the same error as this issue and this issue

I download this file https://github.com/danielholanda/LeFlow/blob/7504ea9a5fcde898d6962eca5efbc5602bb522f2/src/tensorflow/tensorflow-1.6.0-cp27-cp27mu-linux_x86_64.whl and I keep getting the same error

can you please help me with this ?

Hi,
thanks for your amazing project.
I'm willing to do some research for making LeFlow to work on other FPGA platforms, i.e. Lattice ECP5.
Thus end-to-end open-source FPGA toolchain (symbiflow) could be used.

Yet I'm wondering - -
(1) How many LEs are used on Cyclones FPGA for the examples listed in this repo respectively ? (Hence I could evaluate whether LeFlow could fit in Lattice ECP5.)
(2) What kinds of hardware IPs / peripherals provided by Altera/Board are used ? (e.g. UART/PCIe ...... etc for data exchangement ?)

Sincerely,
Ruinland

I'm using Ubuntu 18.04.4 LTS
During the installation, I downloaded the code, then did the following commands

$ sudo apt-get install python-pip
$ sudo python -m pip install --upgrade pip
$ sudo pip install tensorflow
$ sudo pip install numpy
$ cd LeFlow-master/src/
$ chmod +x LeFlow
$ cd ../test/
$ python test_all.py --fast

This fails at the first test which is 03_vecmul_b_f. Also note that leflow_output returned from the subprocess in test_all.py is ('', None)

Find below a dump of the output

Running test for 03_vecmul_b_f
	Generating the circuit...
	Generating new inputs and running Tensorflow with them...
	Testing circuit using Modelsim with new inputs...
cp: cannot stat '03_vecmul_b_f_files/tfArgs/param*.mif': No such file or directory
make: *** No rule to make target 'v'.  Stop.
Traceback (most recent call last):
  File "test_all.py", line 91, in <module>
    modelsim_result = np.array(mif.getModelsimMem(folder+"_files/memory_dump.txt"))
  File "../src/processMif.py", line 77, in getModelsimMem
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/memory_dump.txt'

What may be causing this? Thanks

@danielholanda Awesome project? Which FPGA's have you used to benchmark/test the example lib successfully on?

legup@legup-vm:~/LeFlow/examples/classificationMNIST$ ../../src/LeFlow classificationMNIST.py --modelsim
INFO: Creating project...
INFO: Cleaning previous files...
INFO: Generating IR from tensorflow...
Extracting MNIST_data/train-images-idx3-ubyte.gz
Extracting MNIST_data/train-labels-idx1-ubyte.gz
Extracting MNIST_data/t10k-images-idx3-ubyte.gz
Extracting MNIST_data/t10k-labels-idx1-ubyte.gz
The accuracy over the MNIST data is 90.33%
Expected Result: 6
INFO: Cleaning unused dumped files...
INFO: Converting between LLVM versions...
INFO: Running first batch of optimizations before unrolling...
INFO: Unrolling and Inlining according to user, simplifying elementary branches and optimizing away other values...
INFO: Restructuring the IR signature...
INFO: Rewriting unsupported operations...
INFO: Partitioning arrays...
User did not specify any arrays to partition
INFO: Converting human-readable .ll file to bitcode...
INFO: Starting LegUp Compilation...
INFO: Verilog file generated successfully
INFO: Instrumenting testbench and mapping args and temps
INFO: DONE!
INFO: Starting Modelsim...
Traceback (most recent call last):
File "../../src/LeFlow", line 197, in
run_modelsim()
File "../../src/LeFlow", line 141, in run_modelsim
command = "make v -C {}".format(project_folder)
NameError: global name 'project_folder' is not defined

When I tried to run classificationMNIST.py with modelsim, I'm getting above error.

hello author,

1. i wanted to ask about the performance of the fpga in real time camera. Is it fast enough to be used in self driving cars?
2. can the tensorflow keras models be converted using leflow? also the models must be trained according to the fpga camera resolution?

sorry for silly questions.
thank you

Hello,

This tool is awesome! Unfortunately, I am running into a bit of trouble.

My network includes tf.reduce_mean() and tf.reduce_max() operations. No specific errors are given, but from what I understand looking through LeFlow, the IR fails to generate for these operations. It manifests by failing to copy the final output IR file.

I can replace reduce_max() with some fancy reshaping and a tf.nn.max_pool(), but I do not see a way to replace the reduce_mean().

Do you know what the error could be? I'm happy to help contribute to the source if you are too busy and these functions are not implemented, but I'm not sure where to start.

Thanks!

Michael Santacroce

Need directions/guidance to bring LeFlow to Windows and LegUp 6.1 if possible.

J.

If I will deploy the algorithm with LeFlow, the version of FPGA does have some restrictions ?
The Artix-7 of xilinx could be used?

I successfully compiled and ran the classificationMNIST example. The memory_dump.txt looks like this:
// memory data file (do not edit the following line - required for mem load use)
// instance=/main_tb/top_inst/memory_controller_inst/temp3/ram
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
3a85f6b5
39abb140
3c6c273d
3a0045f5
3c3ac058
3b034bcc
3f73939e
3a0428d1
3b214716
3c82549b

What is this actually saying me?
Thank you in advance

Hi @danielholanda,
Your project was really great and it helped me a lot. I have successfully generated Verilog code as well as successfully creating a Quartus project. However, when synthesizing using the make f command, an error occurs stating that the copysignf module has not been defined. As far as I know other libraries like altera_mf, altera_lnsim are created during Verilog code generation. How can I add such a library to the copysignf module?
Thank you and look forward to hearing from you soon.

legup@legup-vm:~/LeFlow-master/test$ python test_all.py --fast

Running test for 03_vecmul_b_f
Generating the circuit...
Traceback (most recent call last):
File "../../src/LeFlow", line 200, in
run_leflow(args.file_name,tool_path)
File "../../src/LeFlow", line 79, in run_leflow
shutil.copy(project_folder+"ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll",project_folder+project_name+"_ir_1.ll")
File "/usr/lib/python2.7/shutil.py", line 119, in copy
copyfile(src, dst)
File "/usr/lib/python2.7/shutil.py", line 82, in copyfile
with open(src, 'rb') as fsrc:
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/ir/ir-cluster_0__XlaCompiledKernel_true__XlaNumConstantArgs_0__XlaNumResourceArgs_0__module-with-opt.ll'
Generating new inputs and running Tensorflow with them...
Testing circuit using Modelsim with new inputs...
cp: cannot stat ‘03_vecmul_b_f_files/tfArgs/param*.mif’: No such file or directory
/home/legup/legup-4.0/examples//../llvm/Release+Asserts/bin/llvm-dis: Could not open 03_vecmul_b_f.prelto.1.bc: No such file or directory

make[1]: *** [all] Error 1
make: *** [03_vecmul_b_f.v] Error 2
Traceback (most recent call last):
File "test_all.py", line 92, in
modelsim_result = np.array(mif.getModelsimMem(folder+"_files/memory_dump.txt"))
File "../src/processMif.py", line 77, in getModelsimMem
IOError: [Errno 2] No such file or directory: '03_vecmul_b_f_files/memory_dump.txt'

While the mnist convolutional network demo runs for me I get an error on the others, for example the max pooling example. It seems that there is a file missing:

IOError: [Errno 2] No such file or directory: 'maxpoolMNIST_files/ir/ir-cluster_0_XlaCompiledKernel_true__XlaNumeConstantArgs_0_XlaNumResourceArgs_0_module-with-opt.ll'

Hi daniel!
This is a great project. However, I have some questions for asking your help.

1. If i want to test a image for example input a number image to see what number is in the image , where can i set input? Which files or where should i revise?
2. I want to imigrate yoloV3 or tiny yolo to FPGA , can you give me some advices how to do it?

Thanks for your time! Hopefully to hear your response soon!