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rdip

my 4th repository on github

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DLD-Lab_Adder Circuit_Introduction

*2C + S------>2 should be in subscript
*Cin & Cout----------> in & out should be in subscript respectively

*>S = 1 either if (A = 0 and B = 1) or if (A = 1 and B = 0) = A XOR B

C= 1 only if (A = 1 and B = 1) = A AND B ---------->it is better to give this after truth table
The simplest half-adder design, shown in the picture,
incorporatetes an XOR gate for S and an AND gate for C.

*in the truth table, CARRY can be replaced by C, since it has already been introduced. Similarly for full adder

*A full adder adds two 1-bit binary numbers along with a carry brought in and produces a sum and carry out as ouputs.

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