In this investigation Branch Prediction will be considered. We will specifically attempt to look at the situation where the flushing of the pipeline when branch instructions are encountered, as well as investigating the performance difference between predict-taken branches and predict-not-taken. In investigating the above scenarios, we will try to compare it against the performance where the EduMIPS6 waits until EX to resolve branches. We will also attempt to compare the performance if branches could be resolved during IF. Methodology: 1. Change the EduMIPS64 architecture to accommodate for branching by incorporating flushing the pipeline. Perform tests of a standard MIPS program (eg. Gcc). Compare performance metrics (specifically total number of clock cycles), to default architecture (branch predict not-taken). 2. Change the EduMIPS64 architecture to predict-taken for branching. Similarly, we will perform tests of a standard MIPS program (eg. Gcc). Compare performance metrics (specifically total number of clock cycles), to default architecture (branch predict not-taken). 3. Change the EduMIPS64 architecture to resolve branches in the IF stage. This should remove the need for branch prediction. Similarly, we will perform tests of a standard MIPS program (eg. Gcc). Compare performance metrics (specifically total number of clock cycles), to default architecture (branch resolution in the EX stage).