Comments (5)
M0stafaRady
commented on August 20, 2024
Can you provide more information about what are you trying to do and when did you face this issue?
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srknkrdnz
commented on August 20, 2024
I am using virtual machine on windows(ubuntu). I can't copy this to my repository.i am attaching screenshots. What kind of information do you request to me.
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M0stafaRady
commented on August 20, 2024
You can ignore this failure for now it's not a real error. we will take of it soon.
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srknkrdnz
commented on August 20, 2024
Thanks for your information. I tried that but couldn't compile.I copied direct openlane repository.Now i am using.
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vijayank88
commented on August 20, 2024
@M0stafaRady Still this issue not fixed. Can you run and check it once and what could the fix?
Start running test: RTL-counter_wb
-.--ns INFO gpi ..mbed/gpi_embed.cpp:76 in set_program_name_in_venv Did not detect Python virtual environment. Using system-wide Python interpreter
-.--ns INFO gpi ../gpi/GpiCommon.cpp:101 in gpi_print_registered_impl VPI registered
0.00ns INFO cocotb Running on Icarus Verilog version 12.0 (stable)
0.00ns INFO cocotb Running tests with cocotb v1.8.0 from /usr/local/lib/python3.10/dist-packages/cocotb
0.00ns INFO cocotb Seeding Python random module with 1715935980
0.00ns INFO cocotb.regression pytest not found, install it to enable better AssertionError messages
0.00ns INFO cocotb.regression Found test caravel_cocotb.interfaces.common_functions.test_functions.report_test.<locals>.wrapper_func
0.00ns INFO cocotb.regression running report_test.<locals>.wrapper_func (1/1)
/usr/local/lib/python3.10/dist-packages/caravel_cocotb/interfaces/common_functions/Timeout.py:19: DeprecationWarning: This method is now private.
cocotb.scheduler.add(self._timeout_check())
/usr/local/lib/python3.10/dist-packages/caravel_cocotb/interfaces/common_functions/test_functions.py:62: DeprecationWarning: This method is now private.
cocotb.scheduler.add(max_num_error(num_error, caravelEnv.clk))
0.00ns INFO cocotb [caravel] start powering up
Reading firmware.hex
firmware.hex loaded into memory
Memory 5 bytes = 0x6f 0x00 0x00 0x0b 0x13
VCD info: dumpfile waves.vcd opened for output.
225.00ns INFO cocotb [caravel] power up -> connect vdd
225.00ns INFO cocotb [caravel] power up -> connect vcc
===WARNING=== sky130_fd_io__top_xres4v2 : Width of Input pulse for PAD input (= 225.00 ns) is found to be in he range: 50 ns - 600 ns. In this range, the delay and pulse suppression of the input pulse are PVT dependent. : caravel_top.uut.padframe.resetb_pad 225
475.00ns INFO cocotb [caravel] disable housekeeping SPI transmission
525.00ns INFO cocotb [caravel] start resetting
===WARNING=== sky130_fd_io__top_xres4v2 : Width of Input pulse for PAD input (= 300.00 ns) is found to be in he range: 50 ns - 600 ns. In this range, the delay and pulse suppression of the input pulse are PVT dependent. : caravel_top.uut.padframe.resetb_pad 525
===WARNING=== sky130_fd_io__top_xres4v2 : Width of Input pulse for PAD input (= 500.00 ns) is found to be in he range: 50 ns - 600 ns. In this range, the delay and pulse suppression of the input pulse are PVT dependent. : caravel_top.uut.padframe.resetb_pad 1025
1050.00ns INFO cocotb [caravel] finish resetting
1325.00ns INFO cocotb [TEST] Start counter_wb test
1325.00ns INFO cocotb [caravel] release housekeeping SPI transmission
113075.00ns WARNING cocotb simulation are only 18096 cycles away from TIMEOUT
226175.00ns WARNING cocotb simulation are only 13572 cycles away from TIMEOUT
339275.00ns WARNING cocotb simulation are only 9048 cycles away from TIMEOUT
452375.00ns WARNING cocotb simulation are only 4524 cycles away from TIMEOUT
565475.00ns WARNING cocotb simulation are only 0 cycles away from TIMEOUT
565475.00ns ERROR ..tb.Task 0.Timeout._timeout_check Exception raised by this forked coroutine
/usr/local/lib/python3.10/dist-packages/cocotb/scheduler.py:587: FutureWarning: "Unwatched" tasks that throw exceptions will not cause the test to fail. See issue #2664 for more details.
warnings.warn(
565475.00ns INFO cocotb.regression report_test.<locals>.wrapper_func failed
Traceback (most recent call last):
File "/usr/local/lib/python3.10/dist-packages/caravel_cocotb/interfaces/common_functions/Timeout.py", line 31, in _timeout_check
raise SimTimeoutError(
cocotb.result.SimTimeoutError: simulation exceeds the max number of cycles 22620
565475.00ns INFO cocotb.regression *****************************************************************************************************************************************************
** TEST STATUS SIM TIME (ns) REAL TIME (s) RATIO (ns/s) **
*****************************************************************************************************************************************************
** caravel_cocotb.interfaces.common_functions.test_functions.report_test.<locals>.wrapper_func FAIL 565475.00 29.75 19009.70 **
*****************************************************************************************************************************************************
** TESTS=1 PASS=0 FAIL=1 SKIP=0 565475.00 29.80 18974.29 **
*****************************************************************************************************************************************************
Fail: Test RTL-counter_wb has Failed for more info refer to /home/vijayan/OPENLANE_FLOW/caravel_user_project/verilog/dv/cocotb/sim/run_17_May_14_21_15_45/RTL-counter_wb/counter_wb.log
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Related Issues (20)
- gfmpw-1: Makefile displays error with missing cocotb directory
- tag mpw-9e: referenced pdk missing sram maglefs
- gf180mcu SRAM macros causing illegal overlap HOT 1
- gfmpw-1 issues. HOT 2
- gfmpw-1 user_defines constants for bidirectional incorrect.
- gfmpw-1 outdated wrapper dimensions in docs
- gfmpw-1 dv issues HOT 1
- gfmpw1 run-precheck Makefile target uses -it, breaks github actions HOT 2
- LVS errors in the design HOT 1
- reg_debug_2 redefined warning
- Provide config.json file for synthesizing user_project_wrapper
- There is no signoff constraints file
- add the user_defines.v gpio defaults to the default includes to enable much faster simulation / testing
- analog power supply vdda1 and vssaa do not get connected during mixed signal designs HOT 4
- Make target for running LVS and DRC standalone
- Using other Simulators instead of Iverilog
- Fix base_user_proj_example.sdc file for irq port constraints
- cocotb simulation not documented
- Incorrect Makefile recipe dependencies HOT 1
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