❗ Important Note |
---|
Refer to README for a quickstart of how to use caravel_user_project
Refer to README for this sample project documentation.
Refer to the following readthedocs for how to add cocotb tests to your project.
https://caravel-user-project.readthedocs.io
License: Apache License 2.0
❗ Important Note |
---|
Refer to README for a quickstart of how to use caravel_user_project
Refer to README for this sample project documentation.
Refer to the following readthedocs for how to add cocotb tests to your project.
people copy the config and then end up with macros they can't use for a submission because metal5 is used for routing
add this to the user_proj_example config:
set ::env(GLB_RT_MAXLAYER) 5
Cloning caravel_user_project
followed by make install
adds the caravel
submodule.
In the openlane/user_project_wrapper/config.tcl
file, there's the following fixed settings
# YOU ARE NOT ALLOWED TO CHANGE ANY VARIABLES DEFINED IN THE FIXED WRAPPER CFGS
source $::env(CARAVEL_ROOT)/openlane/user_project_wrapper_empty/fixed_wrapper_cfgs.tcl
However, this file and parent directory do not exist in the caravel
submodule
user@ciic-cvc:~/mpw-3/caravel_user_project$ ls caravel/openlane
Makefile
Previously, these files existed.
If you run the precheck on the default design, it fails like this:
mrg@diode ~/data/caravel_user_project ((HEAD detached at mpw-two-c))$ make run-precheck
cd /home/mrg/open_mpw_precheck && \
docker run -v /home/mrg/open_mpw_precheck:/usr/local/bin -v /home/mrg/data/caravel_user_project:/home/mrg/data/caravel_user_project -v /software/PDKs:/software/PDKs -v /home/mrg/data/caravel_user_project/caravel:/home/mrg/data/caravel_user_project/caravel \
-u 1000:1000 efabless/open_mpw_precheck:latest bash -c "python3 open_mpw_prechecker.py --pdk_root /software/PDKs --target_path /home/mrg/data/caravel_user_project -rfc -c /home/mrg/data/caravel_user_project/caravel "
{{PROGRESS}} Executing Step 0 of 8: Extracting GDS Files
{{PROGRESS}} Executing Step 1 of 8: Project License Check
{{WARNING}} SPDX COMPLIANCE Found 22 non-compliant files with the SPDX Standard. Check full log for more information
{{PROGRESS}} Executing Step 2 of 8: YAML File Check
{{PROGRESS}} YAML file valid!
Step 2 done without fatal errors.
{{PROGRESS}} Detected Project Type is "digital"
{{PROGRESS}} Executing Step 3 of 8: Project Compliance Checks
{{PROGRESS}} Manifest Checks Passed. Caravel Version Matches.
{{PROGRESS}} Makefile Checks Passed.
{{WARNING}} Default README.md checks failed because: Could not open file None/README.md
Traceback (most recent call last):
File "/usr/local/bin/base_checks/check_defaults.py", line 69, in has_empty_documentation
with open('%s/README.md'%target_path, 'r') as readme:
FileNotFoundError: [Errno 2] No such file or directory: 'None/README.md'
During handling of the above exception, another exception occurred:
Traceback (most recent call last):
File "open_mpw_prechecker.py", line 363, in <module>
run_check_sequence(target_path, caravel_root, pdk_root, output_directory, run_fuzzy_checks, run_gds_fc, skip_drc, skip_xor, drc_only, dont_compress, manifest_source, run_klayout_drc, run_klayout_fom_density_check, private)
File "open_mpw_prechecker.py", line 200, in run_check_sequence
empty_documentation, reason = check_defaults.has_empty_documentation()
File "/usr/local/bin/base_checks/check_defaults.py", line 82, in has_empty_documentation
errors += "\nCould not open %s/README.md"%directory
NameError: name 'directory' is not defined
make: *** [Makefile:146: run-precheck] Error 1
mrg@diode ~/data/caravel_user_project ((HEAD detached at mpw-two-c))$
Setup: Project is configured with PDK_ROOT pointed to a pre-installed version of the sky130 PDK from open_pdks
Problem: When running "make user_proj_example", I get the following error:
[ERROR]: Failed to compare PDKs.
Could not find SOURCES file for the installed sky130A PDK.
Traceback (most recent call last):
File "/openlane/dependencies/verify_versions.py", line 74, in verify_versions
sources_str = open(sources_file).read()
FileNotFoundError: [Errno 2] No such file or directory: '/usr/share/pdk/sky130A/SOURCES'
During handling of the above exception, another exception occurred:
Traceback (most recent call last):
File "/openlane/dependencies/verify_versions.py", line 77, in verify_versions
"Could not find SOURCES file for the installed sky130A PDK."
Exception: Could not find SOURCES file for the installed sky130A PDK.
[ERROR]: Please update your environment. OpenLane will now quit.
The problem is that OpenLane is looking for a file called SOURCES in directory sky130A. There is no such file created by or installed by open_pdks. OpenLane may not just revise the PDK contents to its own liking. The contents of SOURCES that OpenLane appears to be looking for seems to be the same information that is provided in the pdk installation's .config/nodeinfo.json
file. Why is that file not being used?
I am trying to harden a custom user project macro using OpenLANE. I get the following error during CTS while running
make user_proj_example
:
Initializing clock nets
Looking for clock nets in the design
Net "wb_clk_i" found
Initializing clock net for : "wb_clk_i"
[WARNING] Net "wb_clk_i" has 1 sinks. Skipping...
[ERROR UKN-0000] No clock nets have been found.
Corresponding CTS log is as follows:
OpenROAD 0.9.0 1415572a73
This program is licensed under the BSD-3 license. See the LICENSE file for details.
Components of this program may be licensed under more restrictive licenses which must be honored.
Notice 0: Reading LEF file: /project/openlane/user_proj_example/runs/user_proj_example/tmp/merged_unpadded.lef
Notice 0: Created 13 technology layers
Notice 0: Created 25 technology vias
Notice 0: Created 440 library cells
Notice 0: Finished LEF file: /project/openlane/user_proj_example/runs/user_proj_example/tmp/merged_unpadded.lef
Warning: /home/edaman/Desktop/openlane_workspace/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib line 31, default_operating_condition tt_025C_1v80 not found.
Notice 0:
Reading DEF file: /project/openlane/user_proj_example/runs/user_proj_example/results/placement/user_proj_example.placement.def
Notice 0: Design: user_proj_example
Notice 0: Created 615 pins.
Notice 0: Created 22267 components and 90464 component-terminals.
Notice 0: Created 8 special nets and 0 connections.
Notice 0: Created 8383 nets and 28271 connections.
Notice 0: Finished DEF file: /project/openlane/user_proj_example/runs/user_proj_example/results/placement/user_proj_example.placement.def
[INFO]: Setting output delay to: 4.0
[INFO]: Setting input delay to: 4.0
[INFO]: Setting load to: 0.01765
[INFO]: Configuring cts characterization...
[INFO]: Performing clock tree synthesis...
[INFO]: Looking for the following net(s): decoder_top.clk
[INFO]: Running Clock Tree Synthesis...
[ERROR UKN-0000] Error when finding -clk_nets in DB!
Error: or_cts.tcl, 57 UKN-0000
I complied with the guidelines but couldn't find the cause of this error.
Running 'make pdk' on a fresh mpw-5b branch results in error.
Removing temporary files from destination.
Done with PDK migration.
echo "Ended SKY130 PDK migration on "`date` >> sky130A_install.log
set -f ; ../common/foundry_install.py -std_format -target /tapeout/pdks/open_pdks/sky130/sky130A -clean
Done removing staging area.
touch /tapeout/pdks/sky130A/SOURCES
touch: cannot touch '/tapeout/pdks/sky130A/SOURCES': Permission denied
make[1]: *** [/tapeout/caravel_mpw5_prga/caravel/Makefile:1233: gen-sources] Error 1
make[1]: Leaving directory '/tapeout/caravel_mpw5_prga'
make: *** [Makefile:39: pdk] Error 2
I am trying to place two macros: a picorv32a core and a 2kB SRAM. However the Nesterov Solver never finishes placing the design and eventually errors out with the following error:
[ERROR GPL-0305] RePlAce diverged at newStepLength.
Dimensions of picorv32a: around 0.7 x 0.7 mm2
Dimensions of 2k SRAM: around 0.7 x 0.4 mm2
I set an absolute die area of 2 x 2 mm2, which I think should be good enough
I set the following macro placements:
cpu 500.000 500.000 N
RAM 500.000 1300.00 S
Please let me know if I am doing something wrong here. I also tried some other placements like
cpu 100 100 N
SRAM 100 1000 N
I have attached the reproducible as well.
I noticed that my gate level simulation was failing. I had copied the wb_port
testbench and made updates to it. My RTL simulation ran fine, but gate level simulation failed. On debugging it turns out that the user project wasn't powered up because the power pins are not driven correctly.
wire USER_VDD3V3 = power3;
wire USER_VDD1V8 = power4;
The above code is meant to drive the user project power, but power3
and power4
sequence is nowhere defined in the TB.
Hello,
I am trying to run make verify-io_ports on this caravel user project.
I am getting these errors. Does anyone know how to resolve this issue?
Here are the steps that I followed:
Thanks,
Mousa
Since the caravel_user_project
already includes repo caravel-lite
as a submodule at the location of <repo_root>/caravel
the following line in Makefile
verifies a directory already exists and does not attempt to add a new submodule.
@if [ ! -d $(CARAVEL_ROOT) ]; then git submodule add --name $(CARAVEL_NAME) $(CARAVEL_REPO) $(CARAVEL_ROOT); fi
I followed the instructions in CARAVEL_USER.md
After 900 minutes the flow fails as Tritonroute still has ~500 violations:
here is my command history (deleted commands that are just ls, less, pwd etc)
2086 git clone [email protected]:mattvenn/caravel_user_project.git
2088 cd caravel_user_project/
2092 make install
2093 make simenv
2098 export PDK_ROOT=/home/matt/work/asic-workshop/shuttle2/pdk
2101 make pdk
2102 export CARAVEL_ROOT=$(pwd)/caravel
2109 export SIM=RTL
2115 make verify-io_ports
2120 export OPENLANE_ROOT=$(pwd)/openlane
2124 export OPENLANE_TAG=v0.12
2125 make openlane
2130 time make user_proj_example
tar.gz of user_proj_example directory after the failed run
Running make lvs-gds<macro>
in the caravel directory aborts with an error that it can not find the top cell in the extracted spice netlist.
However, the result file from a previous clean lvs run (make lvs-<macro>
) may still exist stating that there were no errors.
bash-4.2$ make lvs-digital_pll
echo "Extracting digital_pll"
Extracting digital_pll
...
LVS reports no net, device, pin, or property mismatches.
...
LVS: ./spi/lvs/digital_pll.spice vs. ./verilog/gl/digital_pll.v
Comparison result: ./spi/lvs/tmp/digital_pll.v_comp.out
bash-4.2$ ls -ltr ./spi/lvs/tmp/digital_pll.v_comp.out
-rw-r--r--. 1 1000 1001 65625 Jul 1 11:04 ./spi/lvs/tmp/digital_pll.v_comp.out
This is the result of the clean LVS run.
bash-4.2$ make lvs-gds-digital_pll
echo "Extracting digital_pll"
Extracting digital_pll
...
Creating placeholder cell definition for module sky130_fd_sc_hd__einvp_1.
Cannot find cell digital_pll in file ./spi/lvs/digital_pll.spice
python3 /mnt/mpw/2/caravel_user_project/caravel/scripts/count_lvs.py -f ./verilog/gl/digital_pll.v_comp.json | tee ./spi/lvs/tmp/digital_pll.lvs.summary.log
Traceback (most recent call last):
File "/mnt/mpw/2/caravel_user_project/caravel/scripts/count_lvs.py", line 116, in <module>
failures = count_LVS_failures(args.file)
File "/mnt/mpw/2/caravel_user_project/caravel/scripts/count_lvs.py", line 38, in count_LVS_failures
with open(filename, 'r') as cfile:
FileNotFoundError: [Errno 2] No such file or directory: './verilog/gl/digital_pll.v_comp.json'
...
LVS: ./spi/lvs/digital_pll.spice vs. ./verilog/gl/digital_pll.v
Comparison result: ./spi/lvs/tmp/digital_pll.v_comp.out
bash-4.2$ ls -ltr ./spi/lvs/tmp/digital_pll.v_comp.out
-rw-r--r--. 1 1000 1001 65625 Jul 1 11:04 ./spi/lvs/tmp/digital_pll.v_comp.out
The gds LVS run has aborted, but the comparison result from the last run still exists.
magic does not wrap the top level of the extracted spice file in a subckt definition which causes LVS to fail.
@RTimothyEdwards says that this is because openlane does not input/output the port definitions to gds correctly.
Running flow.tcl
on user_project_wrapper
with the default user_proj_example
(counter) result in the following error:
LVS reports:
net count difference = 0
device count difference = 0
unmatched nets = 0
unmatched devices = 0
unmatched pins = 2
property failures = 0
Total errors = 2
magic litex-hub/linux-64::magic-8.3.274_0_g47df9da-20220307_093930
netgen litex-hub/linux-64::netgen-1.5.219_0_ge11dbac-20220309_101211
open_pdks.sky130a litex-hub/noarch::open_pdks.sky130a-1.0.290_0_gc82996f-20220222_104027
openroad litex-hub/linux-64::openroad-2.0_3087_gcd06e5320-20220309_101211
OpenLane: 00da77e58c86a2fa745dafc2f4b277191cb8d3ac
caravel_user_project: afbb1601246c336b1c1e6cd87ecd85d9be8aa4d5
caravel-lite: 477c17fb986b0d3f7f3581e940095b68bd62422f
caravel_mgmt_soc_litex: 3fee299f8177cebf7919eb0e6da7f0f5ad7af31d
missing test, would be good to improve coverage and we can use the work to add to the caravel docs.
maybe there needs to be a list of things to check before making a new tag. My suggestions:
Hi, I get the following errors while trying to build pdk using the make file. Please help
make[4]: *** [Makefile:922: primitive-a] Error 1
make[4]: Leaving directory '/home//caravel_user_project/caravel/open_pdks/sky130'
make[3]: *** [Makefile:858: vendor-a] Error 2
make[3]: Leaving directory '/home//caravel_user_project/caravel/open_pdks/sky130'
make[2]: *** [Makefile:586: all-a] Error 2
make[2]: Leaving directory '/home/caravel_user_project/caravel/open_pdks/sky130'
make[1]: *** [/home/caravel_user_project/caravel/Makefile:1254: build-pdk] Error 2
make[1]: Leaving directory '/home/caravel_user_project'
make: *** [Makefile:38: pdk] Error 2
Repo caravel-lite
uses main
instead of master
git checkout master && \
makefile in caravel is trying to pull master branch of the pdk which fails after the rename.
I installed the necessary libs by using make pdk
command, however when I run make verify-<testbench-name>
, it gives me this warning Include file libs.ref/sky130_sram_macros/verilog/sky130_sram_2kbyte_1rw1r_32x512_8.v not found
. I though, it would have been installed automatically with make pdk
command but it does not. Is there anything that I should make manually to fill missing sky130 macros.
Hi,
could you please tell me the correctness of the following sample inverter design and corresponding wrapper or suggest a forum where I can post similar queries?
I have tried to replace the caravel user project with a simple inverter design using only GPIO interface. Corresponding user project example is modified as below
module user_proj_example (
ifdef USE_POWER_PINS
inout vccd1, // User area 1 1.8V supply
inout vssd1, // User area 1 digital ground
`endif
// IOs
input [`MPRJ_IO_PADS-1:0] io_in,
output [`MPRJ_IO_PADS-1:0] io_out,
);
wire [`MPRJ_IO_PADS-1:0] io_in;
wire [`MPRJ_IO_PADS-1:0] io_out;
wire [31:0] inv_in;
wire [31:0] inv_out;
// IO
assign inv_in = io_in;
assign io_out = inv_out;
inverter(
.inv_in(inv_in),
.inv_out(inv_out),
);
endmodule
module inverter (
input inv_in,
output inv_out
);
wire [31:0] inv_in;
wire [31:0] inv_out;
always @(inv_in)
begin
inv_out=~inv_in;
end
endmodule
`default_nettype wire
similarly the user_project_wrapper is modified as below
`default_nettype none
module user_project_wrapper (
ifdef USE_POWER_PINS inout vdda1, // User area 1 3.3V supply inout vdda2, // User area 2 3.3V supply inout vssa1, // User area 1 analog ground inout vssa2, // User area 2 analog ground inout vccd1, // User area 1 1.8V supply inout vccd2, // User area 2 1.8v supply inout vssd1, // User area 1 digital ground inout vssd2, // User area 2 digital ground
endif
// IOs
input [`MPRJ_IO_PADS-1:0] io_in,
output [`MPRJ_IO_PADS-1:0] io_out,
);
user_proj_example mprj (
ifdef USE_POWER_PINS .vccd1(vccd1), // User area 1 1.8V power .vssd1(vssd1), // User area 1 digital ground
endif
// IO Pads
.io_in (io_in),
.io_out(io_out)
);
endmodule // user_project_wrapper
`default_nettype wire
Environment:
Caravel User Project - mpw-5c release
make user_proj_example
export CARAVEL_ROOT=/home/ayildiz/caravel_user_project/caravel && cd openlane && make user_proj_example
make[1]: Entering directory '/home/ayildiz/caravel_user_project/openlane'
Makefile:41: warning: undefined variable 'MGMT_AREA_ROOT'
Makefile:41: warning: undefined variable 'MGMT_AREA_ROOT'
Makefile:41: warning: undefined variable 'MGMT_AREA_ROOT'
Makefile:41: warning: undefined variable 'MGMT_AREA_ROOT'
###############################################
docker: Error response from daemon: failed to create shim: OCI runtime create failed: invalid mount {Destination:: Type:bind Source:/var/lib/docker/volumes/3209d8012e3bf88735743a1920ae65e38d3cbe446fdc458bbcf85bd5fef0be77/_data Options:[rbind]}: mount destination : not absolute: unknown.
Makefile:41: recipe for target 'user_proj_example' failed
make[1]: *** [user_proj_example] Error 125
make[1]: Leaving directory '/home/ayildiz/caravel_user_project/openlane'
Makefile:69: recipe for target 'user_proj_example' failed
make: *** [user_proj_example] Error 2
Workaround:
git diff Makefile
diff --git a/Makefile b/Makefile
index e787f93..e844240 100644
--- a/Makefile
+++ b/Makefile
@@ -15,6 +15,8 @@
# SPDX-License-Identifier: Apache-2.0
MAKEFLAGS+=--warn-undefined-variables
+MGMT_AREA_ROOT ?= $(shell pwd)/mgmt_core_wrapper
+
CARAVEL_ROOT?=$(PWD)/caravel
PRECHECK_ROOT?=${HOME}/mpw_precheck
MCW_ROOT?=$(PWD)/mgmt_core_wrapper
@@ -66,7 +68,7 @@ setup: install check-env install_mcw pdk openlane
blocks=$(shell cd openlane && find * -maxdepth 0 -type d)
.PHONY: $(blocks)
$(blocks):
- export CARAVEL_ROOT=$(CARAVEL_ROOT) && cd openlane && $(MAKE) $*
+ export CARAVEL_ROOT=$(CARAVEL_ROOT) && export MGMT_AREA_ROOT=$(MGMT_AREA_ROOT) && cd openlane && $(MAKE) $*
dv_patterns=$(shell cd verilog/dv && find * -maxdepth 0 -type d)
dv-targets-rtl=$(dv_patterns:%=verify-%-rtl)
This test should currently fail with the narrow address range.
The full address range is 0x3000_0000 to 0x3fff_ffff
it only tests the first 8 pins. Should test all pins.
I simply followed https://github.com/efabless/caravel_user_project/blob/main/docs/source/quickstart.rst
Finally I write "make setup"
Then at the stage of installing openlane it gives an error:
cd openlane && make openlane
make[1]: Entering directory '/home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane'
if [ -d "/home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane" ]; then
echo "Deleting exisiting /home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane" &&
rm -rf /home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane && sleep 2;
fi
Deleting exisiting /home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane
git clone https://github.com/The-OpenROAD-Project/OpenLane --branch=2022.02.23_02.50.41 --depth=1 /home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane &&
cd /home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane &&
export OPENLANE_IMAGE_NAME=efabless/openlane:2022.02.23_02.50.41 &&
export IMAGE_NAME=efabless/openlane:2022.02.23_02.50.41 &&
make pull-openlane
sh: 0: getcwd() failed: No such file or directory
Cloning into '/home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane'...
fatal: Unable to read current working directory: No such file or directory
make[1]: *** [Makefile:73: openlane] Error 128
make[1]: Leaving directory '/home/mbaykenar/Desktop/caravel_mpw5/mystic_mpw5/openlane'
It seems make openlane first remove openlane folder, then try to clone openlane repo tagged 2022.02.23_02.50.41 and then complain about it ?
btw openlane repo has newer tags now
Hi,
is there any documentation available related to the integration of design included with openlane?
Seems like it's trying to fetch a tag that doesn't exist on dockerhub:
...
docker run --rm -v /home/uri/p/pdk-root:/home/uri/p/pdk-root -v /home/uri/p/caravel_user_project/caravel:/home/uri/p/caravel_user_project/caravel -e CARAVEL_ROOT=/home/uri/p/caravel_user_project/caravel -e PDK_ROOT=/home/uri/p/pdk-root -u 1000:1000 efabless/openlane:current sh -c "cd /home/uri/p/caravel_user_project/caravel; make build-pdk; make gen-sources"
Unable to find image 'efabless/openlane:current' locally
docker: Error response from daemon: manifest for efabless/openlane:current not found: manifest unknown: manifest unknown.
See 'docker run --help'.
make: *** [Makefile:152: pdk-nonnative] Error 125
The content of checks/xor.log while running "make run-precheck"
First Layout: /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper_empty_erased.gds
Second Layout: /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper_erased.gds
Design Name: user_project_wrapper
Output GDS will be: /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper.xor.gds
Reading /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper_empty_erased.gds ..
ERROR: In /usr/local/bin/xor_checks/xor.drc: Stream has unknown format: /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper_empty_erased.gds in Layout::read
ERROR: Stream has unknown format: /home/s2s-svr1/projects/asic/trial/caravel_user_project/checks/user_project_wrapper_empty_erased.gds in Layout::read in MacroInterpreter::execute
please update the README with a version of magic that is known to work.
HI,
I have encountered following error while doing pre-check.
GOLDEN_CARAVEL
envrionment variable is not set. Please set it to point to absolute path to the golden caravel
make: *** [Makefile:114: run-precheck] Error 1
Hi,
How to write testbenches to test the functionality of user modules after integrating into caravel? is there any documentation available?
Expecting that setting CARAVEL_LITE=0 would install the full caravel repo in the default location. Instead it crashes.
[local@mpw-202106 caravel_user_project]$ echo $CARAVEL_LITE
0
[local@mpw-202106 caravel_user_project]$ make install
Installing caravel as a submodule..
Submodule 'caravel-lite' (https://github.com/efabless/caravel-lite) registered for path 'caravel'
Cloning into 'caravel'...
remote: Enumerating objects: 4720, done.
remote: Counting objects: 100% (1105/1105), done.
remote: Compressing objects: 100% (561/561), done.
remote: Total 4720 (delta 550), reused 1083 (delta 544), pack-reused 3615
Receiving objects: 100% (4720/4720), 51.46 MiB | 15.96 MiB/s, done.
Resolving deltas: 100% (2889/2889), done.
Submodule path 'caravel': checked out '13f2590e4b3a74b910dac56a6b757f5a66fd5212'
error: pathspec 'master' did not match any file(s) known to git.
make: *** [install] エラー 1
It appears that this is because the caravel directory already exists and the .gitmodules already contains an entry for caravel-lite to the default location.
Can be temporarily fixed by doing the following after a clone
git add .gitmodules
git rm --cached caravel
git commit -m "Removed submodule "
rm -rf caravel
Specifying CARAVEL_ROOT to a non-default location may also be a work-around.
However, most likely any pulled changes will have the .gitmodules updated to include the submodule definition.
What might work is separate locations for caravel-full and caravel-lite and then switching a link according to CARAVEL_LITE.
I use zsh instead of bash and I get some errors when I execute make verify-
commands. When I run that command, I get file not found error but it is there so, I tried to run manually makefiles where mgmt_core_wrapper/verilog/dv/make/
. However, I got below error.
zsh: permission denied: /home/sukruuzun/caravel_user_project/mgmt_core_wrapper/verilog/dv/make/sim.makefile
.
sudo
is not a solution. In bash, I could run these commands.
Hi,
The gds folder in sky130A has only decap, fakediode and fill cell gds. This is causing the following error. Do we need to copy the std cell gds to the gds folder in sky130A.
[ERROR] LEF Cell 'sky130_fd_sc_hd__a221o_4' has no matching GDS cell. Cell will be empty [ERROR] LEF Cell 'sky130_fd_sc_hd__a221o_1' has no matching GDS cell. Cell will be empty [ERROR] LEF Cell 'sky130_fd_sc_hd__a221o_2' has no matching GDS cell. Cell will be empty
Hi,
Can somebody help in solving this mar drc issue
Violation Message "Local interconnect minimum area < 0.0561um^2 (li.6)
Hi,
I'm trying setup caravel project to my ubuntu 20.04. Used below steps but failing to complete the setup.
#git clone https://github.com/efabless/caravel_user_project.git
#cd caravel_user_project/
#make install
Installing caravel as a submodule..
The following path is ignored by one of your .gitignore files:
../caravel
Use -f if you really want to add it.
make: *** [Makefile:78: install] Error 1
How to fix this error?
Error occurs when running testbenches under verilog/dv,
caravel_user_project/caravel/verilog/rtl/caravel_netlists.v:89: Include file mgmt_core_wrapper.v not found
/caravel does not include proper files for dv simulations.
I get the following error during groute:
[INFO GRT-0103] Extra Run for hard benchmark.
Stack trace:
0# 0x0000000000FD1B49 in openroad
1# 0x00007F469DF93400 in /lib64/libc.so.6
2# grt::FastRouteCore::mazeRouteMSMD(int, int, float, int, int, bool, int, float, int, int, int) in openroad
3# grt::FastRouteCore::run() in openroad
4# grt::GlobalRouter::findRouting(std::vector<grt::Net*, std::allocator<grt::Net*> >&, int, int) in openroad
5# grt::GlobalRouter::globalRoute() in openroad
6# 0x00000000017ADF1F in openroad
7# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
8# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
9# TclObjInterpProcCore in /lib64/libtcl8.5.so
10# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
11# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
12# 0x00007F46A0F73647 in /lib64/libtcl8.5.so
13# TclEvalObjEx in /lib64/libtcl8.5.so
14# 0x00007F46A0FAE27F in /lib64/libtcl8.5.so
15# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
16# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
17# 0x00007F46A0F73647 in /lib64/libtcl8.5.so
18# TclEvalObjEx in /lib64/libtcl8.5.so
19# 0x00007F46A0F2E1D0 in /lib64/libtcl8.5.so
20# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
21# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
22# 0x00007F46A0F73647 in /lib64/libtcl8.5.so
23# TclEvalObjEx in /lib64/libtcl8.5.so
24# 0x00007F46A0F31F00 in /lib64/libtcl8.5.so
25# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
26# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
27# TclObjInterpProcCore in /lib64/libtcl8.5.so
28# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
29# 0x00007F46A0F6B36C in /lib64/libtcl8.5.so
30# TclObjInterpProcCore in /lib64/libtcl8.5.so
31# 0x00007F46A0F26EB2 in /lib64/libtcl8.5.so
32# 0x00007F46A0F27F1E in /lib64/libtcl8.5.so
33# Tcl_EvalEx in /lib64/libtcl8.5.so
34# Tcl_Eval in /lib64/libtcl8.5.so
35# sta::sourceTclFile(char const*, bool, bool, Tcl_Interp*) in openroad
36# ord::tclAppInit(Tcl_Interp*) in openroad
37# Tcl_Main in /lib64/libtcl8.5.so
38# main in openroad
39# __libc_start_main in /lib64/libc.so.6
40# 0x0000000000FCE417 in openroad
[ERROR]: during executing openroad script /openlane/scripts/openroad/groute.tcl
Environment:
Caravel User Project - mpw-5c release
Issue has been reported here:
The-OpenROAD-Project/OpenLane#996 (comment)
The following links in the README are 404:
I'm not sure where they are supposed to be linking.
Hi all,
I am trying to install caravel using the guidelines at this link https://github.com/efabless/caravel_user_project/blob/main/docs/source/index.rst. After I run the following command, I see that the makefile in openlane folder is broken (pls see snapshot)
git clone https://github.com/efabless/caravel_user_project.git
So, when I try to run make openlane
later, it errors out saying it cannot find the makefile. Can someone help fix this in the repo?
Note that I had installed caravel 2 weeks ago using the same guidelines, in a different machine, and it worked fine. The makefile was not broken and make openlane
did not fail. So, something in the repo must have changed since then.
It's broken.
Broken since: d8dd010
by @Manarabdelaty
export OPENLANE_ROOT=blah
make setup
cd OPENLANE_ROOT
make mount
this fails to load the docker image because get_tag.py returns -dev instead of a correct image name.
in a congested design, the router will use the area around the user_project_wrapper pins. this often results in an xor error with the open_mpw_precheck
either:
check less area in the precheck
or
add default obstruction layers protecting this area so the router doesn't use it.
We noticed that our design passes the entire flow with the versions/commit IDs
OPENLANE_TAG = 2021.09.19_20.25.16
SKYWATER_COMMIT = c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
OPEN_PDKS_COMMIT = 6c05bc48dc88784f9d98b89d6791cdfd91526676
but fails during routing when the predefined versions that are defined in current caravel_user_project are used.
Is there any recommended version or commit ID for OpenLANE and SKY130 PDK to be used within Caravel Test Harness and Caravel User Project?
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