Support LitePCIe on Lattice ECP5 SERDES (with open toolchain) about litepcie HOT 12 CLOSED

@whitequark I've looked and it seemed like some fun stuff, could you possibly please sum up in a few bulletpoints to where you've gotten, what sources did you use and what the known bugs/design issues are?

I mean, I will eventually figure that out from the src itself, but doing this would save me (and others) a ton of time, I'd hugely appreciate if you could, please ;)

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@whitequark, @enjoy-digital & @daveshah1 - Any chance you could add a few more details here?

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I'll fill you in next time I work on Yumewatari.

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Yumewatari can be found at https://github.com/whitequark/Yumewatari

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I really want this! @whitequark is Yumewatari PCIe implementation complete? I really can't tell just from the code since I don't know migen.

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No. It is not even close to complete. There are weeks or more realistically months of work left.

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Are there any updates on this front? I'd love to try to help. I should be getting the ECP5-5G Versa sometime in January (8 week lead time is no fun), however I don't have access to one of those fancy keysight scopes. It would be nice to have something with PCIe support on the fully open toolchains.

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@teknoman117: you can have a look and maybe contribute to the ECP5-PCIe project that is trying to create an open-source PCIe PHY on ECP5: https://github.com/ECP5-PCIe/ECP5-PCIe

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Closing since not realistic for now, we could re-discuss this when ECP5-PCIe project will be functional/validated or another project will be available.

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@teknoman117 We're also looking for this functionality, we basically just need a PCIe slave that we can wire up to e.g. Wishbone for MMIO. It looks like the ECP5-PCIe project has things to the point where the link is training and staying online, but I'm not sure how to contact the author(s) directly.

My suspicion is this is something we could all collaborate on to complete in a relatively short period of time, but we need communication open first. 😄

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@teknoman117 We're also looking for this functionality, we basically just need a PCIe slave that we can wire up to e.g. Wishbone for MMIO. It looks like the ECP5-PCIe project has things to the point where the link is training and staying online, but I'm not sure how to contact the author(s) directly.

My suspicion is this is something we could all collaborate on to complete in a relatively short period of time, but we need communication open first.

i pinged him via email (git show) today, thanked him for his work and asked for news.

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