Comments (4)
enjoy-digital
commented on August 23, 2024
Hi @zhangzq71,
the current driver allocates the DMA buffers in litepcie_pci_probe and then use this to configure the DMA descriptor on the hardware in litepcie_dma_writer_start and litepcie_dma_reader_start:
- https://github.com/enjoy-digital/litepcie/blob/master/litepcie/software/kernel/main.c#L237-L238
- https://github.com/enjoy-digital/litepcie/blob/master/litepcie/software/kernel/main.c#L288-L289
So currently the memory allocation is handled by the driver. If you want to do DMA on specific addresses, you'll need to program the DMA descriptors with a customized function.
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zhangzq71
commented on August 23, 2024
Hi,
The descriptor of SGDMA controller was configured in litepcie_dma_writer_start and litepcie_dma_readerer_start,
for(i = 0; i < DMA_BUFFER_COUNT; i++) {
litepcie_writel(s, dmachan->base + PCIE_DMA_WRITER_TABLE_VALUE_OFFSET,
#ifndef DMA_BUFFER_ALIGNED
DMA_LAST_DISABLE |
#endif
(!(i%DMA_BUFFER_PER_IRQ == 0)) * DMA_IRQ_DISABLE | /* generate an msi */
DMA_BUFFER_SIZE); /* every n buffers */
litepcie_writel(s, dmachan->base + PCIE_DMA_WRITER_TABLE_VALUE_OFFSET + 4,
dmachan->writer_handle[i]);
litepcie_writel(s, dmachan->base + PCIE_DMA_WRITER_TABLE_WE_OFFSET, 1);
}
for these code, dmachan->writer_handle[i] is the destination address that located in host, but I can't find where to set the source address that located in FPGA PCIE board, so I want to know what is the source address.
ZhangZQ
…________________________________
发件人: enjoy-digital <[email protected]>
发送时间: 2021年3月3日 12:42
收件人: enjoy-digital/litepcie <[email protected]>
抄送: Zhang Zhi Qiang <[email protected]>; Mention <[email protected]>
主题: Re: [enjoy-digital/litepcie] I found no way in device driver to specify the starting address of DMA? (#50)
Hi @zhangzq71<https://github.com/zhangzq71>,
the current driver allocates the DMA buffers in litepcie_pci_probe and then use this to configure the DMA descriptor on the hardware in litepcie_dma_writer_start and litepcie_dma_reader_start:
* https://github.com/enjoy-digital/litepcie/blob/master/litepcie/software/kernel/main.c#L237-L238
* https://github.com/enjoy-digital/litepcie/blob/master/litepcie/software/kernel/main.c#L288-L289
So currently the memory allocation is handled by the driver. If you want to do DMA on specific addresses, you'll need to program the DMA descriptors with a customized function.
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enjoy-digital
commented on August 23, 2024
The DMAs in LitePCIe are generating/receiving streams of data (similar to AXI Streams). So on the FPGA side, there are no MMAP/destination address, we only have DMAs channels with data sink and source. If you want to also do MMAP on the FPGA, you then have to add a stream to/from MMAP DMA and configure it over PCIe. Such modules can be the WishboneDMAReader/WishboneDMAWriter from https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/dma.py if you want to do DMA on the main bus of the SoC, or LiteDRAMDMAReader``/LiteDRAMDMAWriterfrom https://github.com/enjoy-digital/litedram/blob/master/litedram/frontend/dma.py if you want to do DMA directly to/from the DRAM memory.
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zhangzq71
commented on August 23, 2024
Oh, I see, thank your very much!
ZhangZQ
…________________________________
发件人: enjoy-digital <[email protected]>
发送时间: 2021年3月3日 13:53
收件人: enjoy-digital/litepcie <[email protected]>
抄送: Zhang Zhi Qiang <[email protected]>; Mention <[email protected]>
主题: Re: [enjoy-digital/litepcie] I found no way in device driver to specify the starting address of DMA? (#50)
The DMAs in LitePCIe are generating/receiving streams of data (similar to AXI Streams). So on the FPGA side, there are no MMAP/destination address, we only have DMAs channels with data sink and source. If you want to also do MMAP on the FPGA, you then have to add a stream to/from MMAP DMA and configure it over PCIe. Such modules can be the WishboneDMAReader/WishboneDMAWriter from https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/dma.py if you want to do DMA on the main bus of the SoC, or LiteDRAMDMAReader``/LiteDRAMDMAWriter if you want to do DMA directly to/from the DRAM memory.
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You are receiving this because you were mentioned.
Reply to this email directly, view it on GitHub<#50 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/AAE2VLSMBJVUAEWZHWSY4QTTBY5NHANCNFSM4YQR3XDA>.
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Related Issues (20)
- there is no packet separation capability for dma HOT 3
- flawed DMA driver HOT 1
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- CrossClockDomain FIFO depth too shallow causes inefficiencies HOT 1
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- Support of Non-Transparent Bridge (NTB) for inter-domain communication through PCIe interfaces. HOT 3
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- [NiteFury] Device not enumerating with x1 x2 HOT 4
- dma_test with external loopback HOT 1
- Implementing a versatile PCIe switch using LitePCIe HOT 1
- MSI stalls on Ultrascale+ HOT 2
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- [Feature request] Implementation of a Root Complex HOT 1
- DMAReader not working after update to 2023.12 HOT 8
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- Expanding spiflash functionality in c++ driver with I2C bitbang and SPIMaster functions HOT 6
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