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simulate_master_spi_lib's Introduction

基于操作 GPIO 的模拟主机 SPI 库

  • 由于需要通过通过上拉获取输入,建议引脚设为开漏上拉
  • 需要实现引脚的电平切换函数
  • 片选引脚自行操作
  • CPOL:时钟极性: SCLK 空闲电平
    • CPOL=0,表示当 SCLK=0 时处于空闲态,所以有效状态就是SCLK处于高电平时
    • CPOL=1,表示当 SCLK=1 时处于空闲态,所以有效状态就是SCLK处于低电平时
  • CPHA:时钟相位: 数据采样在第几个边沿
    • CPHA=0,表示数据采样是在第1个边沿,数据发送在第2个边沿
    • CPHA=1,表示数据采样是在第2个边沿,数据发送在第1个边沿
  • Mode CPOL CPHA
    Mode0 0 0
    Mode1 0 1
    Mode2 1 0
    Mode3 1 1

改进 : 实现类似 Modebus 寄存器的 SPI 从机

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