A series of schematics, layouts, and test files used for the construction of an 8-bit register file and ALU. The layout was completed using the open-source Magic VLSI Layout Tool, and the schematic was constructed IRSIM. Layout-versus-schematic checks were completed using IRSIM, and the transient response was simulated using HSpice.
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A series of schematics, layouts, and test files used for the construction of an 8-bit register file and ALU. The layout was completed using the open-source Magic VLSI Layout Tool, and the schematic was constructed IRSIM. Layout-versus-schematic checks were completed using IRSIM, and the transient response was simulated using HSpice.