Giter VIP home page Giter VIP logo

freertos-riscv's People

Contributors

illustris avatar julio-gago-metempsy avatar magicalpear avatar sherrellbc avatar

Stargazers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

Watchers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

freertos-riscv's Issues

Readme file

Hi Harikrishnan,

Can you please add a readme file that can describe what changes you made in the port.
looking forward to use FreeRTOS on spike simulator.

Multi-processor simulation of FreeRTOS using Spike

Hello,

I'm trying to use FreeRTOS for a multi-core platform. So I began with Spike simulation.
When I run the app using the new version of spike it succeeds. But if I run it with -p2 dual-core I get the (tohost = 6) error again !!
image
image
Does running FreeRTOS with multi-core need any specific configuration or code adjustment?

Best regards,
Noureddine

Doesn't compile

Hello,

I'm trying to compile FreeRTOS but unsuccessfully. I get an error:

../Source/portable/GCC/RISCV/port.c:225:31: error 'CONFIG_STRING_ADDR' undeclared (first use in this function)
uint32_t addr = (uint32_t)CONFIG_STRING_ADDR;

Maybe I'm doing something wrong? I just ran make and that's it.

the running result in spike meet error.

hi, illustris,
Great work!
I compiled and installed the newest riscv-tools.
I can compile FreeRTOS-RISCV (32bit & 64bit) correctly.
But I can not run riscv-spike.elf in spike, it looks can load an run, but meet error.

$ riscv32-spike riscv-spike.elf
riscv32-spike: ../fesvr/device.cc:44: void device_t::handle_identify(command_t): Assertion `addr % IDENTITY_SIZE == 0' failed.

riscv64-spike riscv64-spike.elf
: q
no output.

Can you give me any advice?
Thank you!

Run-time access fault with default build

The binary does not build without modification because this string is commented out. The build finishes properly if the string is uncommented, but this line ultimately causes a run-time access fault.

The system will read memory from CONFIG_STRING_ADDR+0x0c and then attempt to dereference the result. When I ran it, this resulted in an attempt to dereference address 0x182b283, which causes a run-time fault. It looks as if this code was introduced with abc678b.

What is the purpose of the configuration string and what should it be when running in spike?

Porting RTOS for my RISC-V processor

I need to port freeRTOS to my RISC-V processor(32 bit architecture with ITLB and DTLB).Can you give procedures,how to convert your source code to my processor?

FreeRTOS and lowRISC old spike simulation

Hello,
I'm trying to run FreeRTOS using Spike (lowRISC) but I get this problem:
On the right: The demo built with a (recent compiler from Rocket-Chip repo) and tested with (recent) spike
On the left : The demo built with a lowRISC toolchain and tested with its 'old' spike --> got *** FAILED *** (tohost = 6)

Another case if i build the app with recent compiler and run it with old spike i get (tohost = 2)

image

I guess this is due to ISA spec version incompatibility? How can I resolve this and run FreeRTOS under the lowRISC spike version?

Thank you very much for your efforts.

timer interrupt not firing

Thanks this amazing port to spike.
But simple demo running just two tasks with printf and delay will not schedule correctly due to timer IRQ not firing as it should.
Context_Restore force mstatus to 0x1800, mret will clear MIE.
Temp fix is to remove csrs in ContextRestore, and only set mstatus to 1880 in Yield, right before ContextRestore. Not sure if this will have some side-effects.

Need Info on Uart addition to FreeRtos RISCV port

Hi,

I am looking for UART driver address location and related information. I do find options to configure UART at different location for luminarymicro. Is there something similar there for RISCV port ?
Suppose I want to configure at adrress 0x11200. how to do it ?

Recommend Projects

  • React photo React

    A declarative, efficient, and flexible JavaScript library for building user interfaces.

  • Vue.js photo Vue.js

    ๐Ÿ–– Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.

  • Typescript photo Typescript

    TypeScript is a superset of JavaScript that compiles to clean JavaScript output.

  • TensorFlow photo TensorFlow

    An Open Source Machine Learning Framework for Everyone

  • Django photo Django

    The Web framework for perfectionists with deadlines.

  • D3 photo D3

    Bring data to life with SVG, Canvas and HTML. ๐Ÿ“Š๐Ÿ“ˆ๐ŸŽ‰

Recommend Topics

  • javascript

    JavaScript (JS) is a lightweight interpreted programming language with first-class functions.

  • web

    Some thing interesting about web. New door for the world.

  • server

    A server is a program made to process requests and deliver data to clients.

  • Machine learning

    Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.

  • Game

    Some thing interesting about game, make everyone happy.

Recommend Org

  • Facebook photo Facebook

    We are working to build community through open source technology. NB: members must have two-factor auth.

  • Microsoft photo Microsoft

    Open source projects and samples from Microsoft.

  • Google photo Google

    Google โค๏ธ Open Source for everyone.

  • D3 photo D3

    Data-Driven Documents codes.