Hello
I am looking for a way to change the device tree files to disable HDMI in B input . What i did was commenting out some of the lines in the device tree which i thought is related with HDMI in B
Following is the file i changed . and it didn't seem to work
`
/*
- arch/arm64/boot/dts/tegra210-jetson-tx1-p2597-2180-a01-devkit.dts
- Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; version 2 of the License.
- This program is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
*/
#include "tegra210-jetson-cv-base-p2597-2180-a00.dts"
/ {
model = "jetson_tx1";
compatible = "nvidia,jetson-cv", "nvidia,tegra210";
nvidia,dtsfilename = FILE;
#address-cells = <2>;
#size-cells = <2>;
chosen {
bootloader {
nvidia,skip-display-init;
};
};
host1x {
dc@54200000 {
status = "disabled";
};
dc@54240000 {
nvidia,dc-or-node = "/host1x/sor1";
};
dsi {
status = "disabled";
panel-a-wuxga-8-0 {
status = "disabled";
};
panel-s-wqxga-10-1 {
status = "disabled";
};
};
};
i2c@7000c400 {
lp8557-backlight-a-wuxga-8-0@2c {
status = "disabled";
};
};
pinmux@700008d4 {
common {
/*
* Pull down the INT pin of the TC358840 (HDMI IN A) while
* in reset in order to set i2c address 0x0F.
*/
cam1_pwdn_ps7 {
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
/*
* Pull up the INT pin of the TC358840 (HDMI IN B) while
* in reset in order to set i2c address 0x1F.
*/
// cam2_pwdn_pt0 {
// nvidia,enable-input = <TEGRA_PIN_ENABLE>;
// nvidia,pull = <TEGRA_PIN_PULL_UP>;
// nvidia,tristate = <TEGRA_PIN_DISABLE>;
// };
};
};
/*
* Delete device-tree entries by Nvidia for camera hardware that is not
* available on the HDMI2CSI hardware and not supported by tegra_vi2
*/
/delete-node/ plugin-manager;
i2c1: i2c@7000c000 {
/delete-node/ ov23850_c@36;
/delete-node/ lc898212@72;
};
aliases {
/delete-property/ gpio288;
};
host1x {
/delete-node/ vi;
/delete-node/ i2c@546c0000;
/delete-node/ i2c@70000c000;
};
host1x {
/* /dev/i2c-6: Note the shift of 1! */
i2c7: i2c@546c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,tegra210-vii2c";
reg = <0x0 0x546C0000 0x0 0x00034000>;
status = "okay";
iommus = <&smmu 18>;
interrupts = <0 17 0x04>;
scl-gpio = <&gpio ((18 * 8) + 2) 0>;
sda-gpio = <&gpio ((18 * 8) + 3) 0>;
clock-frequency = <400000>;
bus-pullup-supply = <&max77620_sd3>;
avdd_dsi_csi-supply = <&max77620_sd3>;
/* HDMI IN A (4K) */
tc358840xbg@0f {
compatible = "toshiba,tc358840xbg";
reg = <0x0f>;
status = "okay";
/* GPIO */
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_LOW>;
/* Interrupt */
interrupt-parent = <&gpio>;
interrupts = <CAM0_PWDN IRQ_TYPE_LEVEL_HIGH>;
refclk_hz = <48000000>; /* 40 - 50 MHz */
ddc5v_delay = <1>; /* 50 ms */
/* HDCP */
/* TODO: Not yet implemented */
enable_hdcp = <0>;
/* CSI Output */
csi_port = <3>; /* Enable TX0 (4 lanes) & TX1 (4 lanes) */
lineinitcnt = <0x00000FA0>;
lptxtimecnt = <0x00000004>;
tclk_headercnt = <0x00180203>;
tclk_trailcnt = <0x00040005>;
ths_headercnt = <0x000D0004>;
twakeup = <0x00003E80>;
tclk_postcnt = <0x0000000A>;
ths_trailcnt = <0x00080006>;
hstxvregcnt = <0x00000020>;
/* PLL */
/* Bps per lane is (refclk_hz / pll_prd) * pll_fbd */
pll_prd = <10>;
pll_fbd = <125>;
port {
hdmi_in_a: endpoint {
remote-endpoint = <&csi_a>;
};
};
};
// /* HDMI IN B (Full HD) /
// tc358840xbg@1f {
// compatible = "toshiba,tc358840xbg";
// reg = <0x1f>;
// status = "okay";
//
// / GPIO /
// reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_LOW>;
//
// / Interrupt /
// interrupt-parent = <&gpio>;
// interrupts = <CAM1_PWDN IRQ_TYPE_LEVEL_HIGH>;
//
// refclk_hz = <48000000>; / 40 - 50 MHz /
//
// ddc5v_delay = <1>; / 50 ms /
//
// / HDCP /
// / TODO: Not yet implemented /
// enable_hdcp = <0>;
//
// / CSI Output /
// csi_port = <1>; / Enable TX0 only /
//
// lineinitcnt = <0x00000FA0>;
// lptxtimecnt = <0x00000004>;
/// tclk_headercnt = <0x00180203>;
// tclk_trailcnt = <0x00040005>;
// ths_headercnt = <0x000D0004>;
// twakeup = <0x00003E80>;
// tclk_postcnt = <0x0000000A>;
// ths_trailcnt = <0x00080006>;
// hstxvregcnt = <0x00000020>;
//
// / PLL /
// / Bps per lane is (refclk_hz / pll_prd) * pll_fbd */
// pll_prd = <10>;
// pll_fbd = <125>;
//
// port {
// hdmi_in_b: endpoint {
// remote-endpoint = <&csi_b>;
// };
// };
// };
};
};
pinmux@700008d4 {
common {
/*
* Pull down the INT pin of the TC358840 (HDMI IN A) while
* in reset in order to set i2c address 0x0F.
*/
cam1_pwdn_ps7 {
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
/*
* Pull up the INT pin of the TC358840 (HDMI IN B) while
* in reset in order to set i2c address 0x1F.
*/
// cam2_pwdn_pt0 {
// nvidia,enable-input = <TEGRA_PIN_ENABLE>;
// nvidia,pull = <TEGRA_PIN_PULL_UP>;
// nvidia,tristate = <TEGRA_PIN_DISABLE>;
// };
};
};
host1x {
vi {
compatible = "nvidia,tegra210-vi2";
reg = <0x0 0x54080000 0x0 0x40000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
//clocks = <&tegra_car TEGRA210_CLK_VI>,<&tegra_car TEGRA210_CLK_CSI>,<&tegra_car TEGRA210_CLK_PLL_C>;
clocks = <&tegra_car TEGRA210_CLK_ID_VI>,
<&tegra_car TEGRA210_CLK_ID_CSI>,
<&tegra_car TEGRA210_CLK_ID_CSUS>,
<&tegra_car TEGRA210_CLK_ID_ISP>,
<&tegra_car TEGRA210_CLK_ID_CILAB>,
<&tegra_car TEGRA210_CLK_ID_CILCD>,
<&tegra_car TEGRA210_CLK_ID_CILE>,
<&tegra_car TEGRA210_CLK_ID_VI_SENSOR>,
<&tegra_car TEGRA210_CLK_ID_VI_SENSOR2>,
<&tegra_car TEGRA210_CLK_ID_PLL_D>;
clock-names = "vi", "csi", "csus", "isp", "cilab",
"cilcd", "cile", "vi_sensor", "vi_sensor2", "pll_d";
power-domains = <&ve_pd>;
iommus = <&smmu 18>;
resets = <&tegra_car 20>;
reset-names = "vi";
avdd_dsi_csi-supply = <&max77620_ldo0>;
#address-cells = <1>;
#size-cells = <0>;
/* HDMI IN A (dual-link) */
vi_port_0: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_a: endpoint@0 {
reg = <0>;
remote-endpoint = <&hdmi_in_a>;
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
};
csi_b: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_in_a>;
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
};
};
/* HDMI IN B */
// port@2 {
// reg = <2>;
//
// #address-cells = <1>;
// #size-cells = <0>;
//
// csi_c: endpoint {
// reg = <0>;
// remote-endpoint = <&hdmi_in_b>;
// clock-lanes = <0>;
// data-lanes = <1 2 3 4>;
// };
// };
};
};
backlight {
status = "disabled";
};
regulators {
/* Enable power supply for HDMI extension board */
/* VDD_SYS_EN */
en_vdd_cam: regulator@5 {
regulator-boot-on;
regulator-always-on;
};
/* CAM_VDD_1V8_EN */
en_vdd_cam_1v8: regulator@211 {
regulator-boot-on;
regulator-always-on;
};
/* CAM_VDD_1V2_EN */
en_vdd_cam_1v2: regulator@209 {
regulator-boot-on;
regulator-always-on;
};
};
tegra_axbar: ahub {
status = "okay";
tegra_i2s4: i2s@702d1300 {
status = "okay";
};
};
sound_card: sound {
compatible = "nvidia,tegra-audio-t210ref-mobile-rt565x";
nvidia,model = "tegra-snd-t210ref-mobile-rt565x";
nvidia,num-codec-link = <5>;
nvidia,audio-routing =
"x Headphone Jack", "x HPO L Playback",
"x Headphone Jack", "x HPO R Playback",
"x MICBIAS1", "x Mic Jack",
"x IN1P", "x Mic Jack",
"x Mic Det Power", "x Mic Jack",
"x Int Spk", "x SPO Playback",
"x DMIC L1", "x Int Mic",
"x DMIC L2", "x Int Mic",
"x DMIC R1", "x Int Mic",
"x DMIC R2", "x Int Mic",
"x Headphone", "x OUT",
"x IN", "x Mic",
"y Headphone", "y OUT",
"y IN", "y Mic",
"l IN", "l OUT",
"s Headphone", "s OUT",
"s IN", "s Mic";
nvidia,xbar = <&tegra_axbar>;
/* The codec-dai here is initialized to dummy and will be */
/* replaced with rt565x codec-dai on detecting super-module */
nvidia,dai-link-1 {
link-name = "rt565x-playback";
cpu-dai = <&tegra_i2s1>;
codec-dai = <&spdif_dit4>;
cpu-dai-name = "I2S1";
codec-dai-name = "dit-hifi";
format = "i2s";
// bitclock-slave;
bitclock-master;
// frame-slave;
frame-master;
bitclock-noninversion;
frame-noninversion;
// bit-format = "s16_le";
bit-format = "s32_le";
// bclk_ratio = <0>;
bclk_ratio = <0>;
srate = <48000>;
num-channel = <2>;
ignore_suspend;
name-prefix = "x";
};
nvidia,dai-link-2 {
link-name = "spdif-dit-1";
cpu-dai = <&tegra_i2s2>;
codec-dai = <&spdif_dit1>;
cpu-dai-name = "I2S2";
codec-dai-name = "dit-hifi";
format = "dsp_a";
bitclock-slave;
frame-slave;
bitclock-inversion;
frame-inversion;
bit-format = "s16_le";
bclk_ratio = <4>;
srate = <8000>;
num-channel = <1>;
ignore_suspend;
name-prefix = "y";
};
nvidia,dai-link-3 {
link-name = "spdif-dit-2";
cpu-dai = <&tegra_dmic3>;
codec-dai = <&spdif_dit2>;
cpu-dai-name = "DMIC3";
codec-dai-name = "dit-hifi";
format = "i2s";
bit-format = "s16_le";
srate = <48000>;
num-channel = <2>;
ignore_suspend;
name-prefix = "z";
};
nvidia,dai-link-4 {
link-name = "spdif-dit-3";
cpu-dai = <&tegra_i2s3>;
codec-dai = <&spdif_dit3>;
cpu-dai-name = "I2S3";
codec-dai-name = "dit-hifi";
format = "i2s";
bitclock-slave;
frame-slave;
bitclock-noninversion;
frame-noninversion;
bit-format = "s16_le";
bclk_ratio = <0>;
srate = <48000>;
num-channel = <2>;
ignore_suspend;
name-prefix = "l";
};
nvidia,dai-link-5 {
link-name = "spdif-dit-0";
cpu-dai = <&tegra_i2s4>;
codec-dai = <&spdif_dit0>;
cpu-dai-name = "I2S4";
codec-dai-name = "dit-hifi";
format = "i2s";
// bitclock-slave;
bitclock-master;
// frame-slave;
frame-master;
bitclock-noninversion;
frame-noninversion;
// bit-format = "s16_le";
bit-format = "s32_le";
// bclk_ratio = <0>;
bclk_ratio = <0>;
srate = <48000>;
num-channel = <2>;
ignore_suspend;
name-prefix = "s";
};
};
hda@70030000 {
status = "okay";
};
};
`
However i saw a dtb file in the prebuilt image named tegra210-jetson-tx1-p2597-2180-a01-devkit-hdmi2csi-hdmib-disabled.dtb but i didnt find the source file of this binary . I am using l4t-24.2.1 . using the prebuilt image isn't an option for me because of other changes and drivers . I must compile by myself . So if you happen to have the source file of the hdmi B disabling dtb file (dtsi) it would mean a lot to me .
Regards