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vhdl_tb's Issues

Cannot generate a testbench with case statements + when a | b

Had an issue earlier with my code. It seems that the generator doesn't work with such structures:

case my_signal is
when value1 | value2 =>
-- do something
-- [...]

Here is the log:

==> VHDL testbench generator 0.7.6 <==
analyzing VHDL file : test.vhd
an error occured during LEXICAL analysis. Sorry. Aborting.
lexing error line 12 around : ...'| "01'... 
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/generic_lexer.rb:42:in `get_token'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/generic_lexer.rb:32:in `next_token'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/generic_lexer.rb:56:in `tokenize'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/parser.rb:23:in `lex'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/parser.rb:33:in `parse'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/compiler.rb:77:in `analyze'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/lib/compiler.rb:62:in `generate'
/var/lib/gems/2.5.0/gems/vhdl_tb-0.7.6/bin/vhdl_tb:6:in `<top (required)>'
/usr/local/bin/vhdl_tb:23:in `load'
/usr/local/bin/vhdl_tb:23:in `<main>'

Minimal example (rename it with *.vhd extension): test.vhd

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