Simulation framework about ac_inout_psu HOT 8 CLOSED

I updated the hardwaredescriptions page with the steps to build uart programs that I have used for testing the hardware. readme file also has a link to it. I also added the unit test framework on the projects page as that it something that needs to be built sooner or later.

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Great news that someone else has managed to build it!
I have an intention to create a set of test benches to have unit tests for the code and have them run with the ghdl script found in the project root for continuous integration style workflow. So far I haven't gotten around to write simulations for the fifo, ram and ddr io that are implemented with quartus IP cores thus there aren't working simulations for most of the features right now unfortunately.

The testbench for the hw multiplier works though

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Vunit also has a github actions availabe https://github.com/VUnit/vunit_action which I will (probably) be using eventually.

The way I've envisioned the tests to work is that running the test benches should be part of normal code development flow. If running the GHDL simulations takes only seconds, there should be a script that builds the module header packages for syntax checking as well as runs all of the basic functional simulations. Even if most of the tests do nothing more than just basic simulation that requires the developer to look at the waveform, running the tests pretty much continuously prevents the situation where the code breaks and need to be maintained after large changes in the code base.

The tests should be done using the objects instead of the application code, which mostly uses many different modules. For this reason the code should be written by wrapping the different functional units to own code objects that can be simulated separately. For example the test for ethernet frame transmitter is

frame_transmitter_starter : process(simulator_clock)

begin
    if rising_edge(simulator_clock) then
        if clocked_reset = '0' then
            simulator_counter <= 0;
        else
            simulator_counter <= simulator_counter + 1;
            create_transmit_controller(frame_transmit_controller);
            if simulator_counter = 10 then
                transmit_ethernet_frame(frame_transmit_controller, 27);
            end if; 

        end if; -- rstn
    end if; --rising_edge
end process frame_transmitter_starter;	

Although it no longer works since the fifo and ram modules were added to the frame_transmit_controller, the code was initially developed using this testbench. Testing a lot of small things separately is more valuable than larger modules since the entire system is testable in a few minutes by compiling the code to the hardware.

For testing purpose the codebase is still lacking models for RAM and FIFO module simulation architectures that are needed for the ethernet communication to be testable so those would be very useful.

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I do agree with you about testing small and testing often. That's what VUnit is all about.
"running the test benches should be part of normal code development flow" : perfect! Someone says test should be built PRIOR to code development, but those are extremists (TDD)!
I have done a pull request with my feature/vunit branch #32
"Testing a lot of small things separately is more valuable than larger modules since the entire system is testable in a few minutes by compiling the code to the hardware." : right, in case the design is small enough to compile fast to hardware.

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Maybe this https://vhdlwhiz.com/link-quartus-ip-libraries-to-vunit/ could help for integrating RAM/FIFO IP into the simulation scripts

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Where is the unit test framework on the projects page?

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It was called scripts for calling test benches so i renamed it unit test framework scripts for testbenches

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