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pymtl3

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

pymtl3-net

Project repo for the POSH on-chip network generator

pyramic-dataset

48-Channel Anechoic Audio Recordings of 3D Sources

pyverilog

Python-based Hardware Design Processing Toolkit for Verilog HDL

qpython

QPython is the Python engine for android. QPython Ox is mainly aimed at programming learners, and it provides more friendly features for beginners.

raven-picorv32

Silicon-validated SoC implementation of the PicoSoc/PicoRV32

remake

Enhanced GNU Make - tracing, error reporting, debugging, profiling and more

rggen

Code generation tool for configuration and status registers

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

riscv-crypto

RISC-V cryptography extensions standardisation work.

riscv-matrix-project

Top project for RISC-V Matrix extension proposal and related opensource implementations.

riscv-soc-book

关于RISC-V你所需要知道的一切

riscv64

Docker RISC-V 64 GCC and Spike RISC-V ISA Simulator

ritter-soc

a 4-pipeline riscv soc , based with rv32im ,designed by verilog

rocket-chip

Rocket Chip Generator

rsa-c

rsa-python

rsa-verilog

runninglinuxkernel_4.0

《奔跑吧Linux内核》配套实验平台和代码，白色入门酱香篇，蓝色进阶浓香篇

runninglinuxkernel_5.15

奔跑吧linux内核第二版（卷1，卷2，入门篇） 实验平台 - 5.15版本

rvcc

sap-voicebox

Speech Processing Toolbox for MATLAB

saxonsoc

SoC based on VexRiscv and ICE40 UP5K

scratch-gui

Graphical User Interface for creating and running Scratch 3.0 projects.

scratch-www

Standalone web client for Scratch

sd-card-controller

WISHBONE SD Card Controller IP Core

sdr5

Design files for sdr5 prototype (Zynq + AD9363)

sdram-controller

Generic FPGA SDRAM controller, originally made for AS4C4M16SA

sensorfusion-ukf

激光雷达和毫米波雷达数据融合基于无迹卡尔曼滤波算法c++工程项目

serv

SERV - The SErial RISC-V CPU