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Home Page: http://www.squirrel-electronics.com/lcsdrgong-cheng.html
我也在研究类似的东西,主要是接收短波CW信号
我的结构大概是天线 --> 10bit ADC --> fpga ---> usb
1.我发现天线接ADC采集的才0~0x22 左右,另外很奇怪ADI的ADC为啥没有输入时是高电平的,而且我测了很多都是。这样设计LNA有什么注意的吗
2.另外DDS产生的正余弦信号乘以ADC输出的时候,ADC输出的值太小有没有什么影响。
3.DDS产生的正余弦数据配置的时候,频率有什么注意,如果DDS模块的时钟太低,我发现产生的信号有失真,如何解决这个问题,我看毛子的代码是直接用20M的时钟,用20M的时钟产生一个7.023M的频率,可以吗
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