Comments (5)
enjoy-digital
commented on June 26, 2024
Hi @tcal-x,
the integration of ValentyUSB is a bit hacky for now. Changes have been done to ValentyUSB to fix this and we are using a different repository. You can just do rm -rf valentyusb in the same directory you are runng the target, is should solves the issue.
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tcal-x
commented on June 26, 2024
Thank you @enjoy-digital ,
Is the goal of removing the valentyusb directory to disable UART, or to refresh the clone of valentyusb?
In any case, I see the same issue -- after removing valentyusb/ and rerunning, the ./fomu.py script performs the clone again, and the same error results.
If time allows, I will try to debug the issue further.
$ cd valentyusb/
$ git remote -v
origin https://github.com/litex-hub/valentyusb (fetch)
origin https://github.com/litex-hub/valentyusb (push)
$ git branch
* hw_cdc_eptri
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enjoy-digital
commented on June 26, 2024
@tcal-x: the goal was to do a clean clone of ValentyUSB, but I think the issue is that LiteX is not up to date on your setup so ValentyUSB is not building correctly.
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tcal-x
commented on June 26, 2024
Thank you @enjoy-digital ; I had been trying to update my LiteX using litex_setup.py update, but that didn't fix the problem.
When I did a completely new install of everything, starting with an empty directory, wgetting litex_setup.py, and then running litex_setup.py init install in a virtual environment, then it worked.
Well, the LiteX side of it worked. I encountered the following. I ran using tools from fomu-toolchain v1.5.6, from March; maybe I need newer versions of Yosys and nextpnr-ice40.
Info: Device utilisation:
Info: ICESTORM_LC: 6436/ 5280 121%
Info: ICESTORM_RAM: 28/ 30 93%
Info: SB_IO: 11/ 96 11%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 1 100%
Info: SB_WARMBOOT: 0/ 1 0%
Info: ICESTORM_DSP: 4/ 8 50%
Info: ICESTORM_HFOSC: 0/ 1 0%
Info: ICESTORM_LFOSC: 0/ 1 0%
Info: SB_I2C: 0/ 2 0%
Info: SB_SPI: 0/ 2 0%
Info: IO_I3C: 0/ 2 0%
Info: SB_LEDDA_IP: 0/ 1 0%
Info: SB_RGBA_DRV: 0/ 1 0%
Info: ICESTORM_SPRAM: 4/ 4 100%
Info: Placed 14 cells based on constraints.
ERROR: Unable to place cell 'main_basesoc_timer_value_status_SB_DFFESR_Q_27_DFFLC', no Bels remaining of type 'ICESTORM_LC'
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tcal-x
commented on June 26, 2024
In case anyone finds this, my problem above is because I was not specifying the correct VexRiscv variant. From @enjoy-digital 's tweet in October, these are the known good recipes:
./fomu.py --cpu-type=serv --build --flash
./fomu.py --cpu-type=vexriscv --cpu-variant=minimal --build --flash
You should then see this from dmesg:
[290570.358648] usb 1-2.4: USB disconnect, device number 31
[290570.440320] usb 1-2.4: new full-speed USB device number 32 using xhci_hcd
[290570.541616] usb 1-2.4: New USB device found, idVendor=1209, idProduct=5bf2, bcdDevice= 1.01
[290570.541622] usb 1-2.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[290570.541626] usb 1-2.4: Product: OrangeCrab CDC
[290570.541629] usb 1-2.4: Manufacturer: GsD
[290570.550521] cdc_acm 1-2.4:1.0: ttyACM0: USB ACM device
...and now you can connect via litex_term, picocom, etc.
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