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amiga2000-gfxcard

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

baidupcs-go

iikira/BaiduPCS-Go原版基础上集成了分享链接/秒传链接转存功能

ch32v003fun

An open source software development stack for the CH32V003, a 10¢ 48 MHz RISC-V Microcontroller

cnn-fpga

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

convolution_network_on_fpga

CNN acceleration on virtex-7 FPGA with verilog HDL

cookabarra

a training-target implementation of rv32im, designed to be simple and easy to understand

cores

Various HDL (Verilog) IP Cores

cortexm0_soc

corundum

Open source FPGA-based NIC and platform for in-network compute

cuda-by-example-source-code-for-the-book-s-examples-

CUDA by Example, written by two senior members of the CUDA software platform team, shows programmers how to employ this new technology. The authors introduce each area of CUDA development through working examples.

displayport_verilog

A Verilog implementation of DisplayPort protocol for FPGAs

fastmemcpy

Speed-up over 50% in average vs traditional memcpy in gcc 4.9 or vc2012

fpga-ethernet-udp

An HDL design for sending data over Ethernet

fpga-network-stack

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

ftd2xx-embedded-hal

Implements the rust embedded-hal traits for FTDI devices.

gcnasm

GCN ISA assembler tool for my GSoC project at Openwall

hello_triangle

Hello World like demo for Vulkan API

hw

RTL, Cmodel, and testbench for NVDLA

learnopengl-cn

http://learnopengl.com 系列教程的简体中文翻译

lwip-linux

This is a version of lwip running on Ubuntu

may_rpc

rust coroutine based rpc framework

miaow

An open source GPU based off of the AMD Southern Islands ISA.

mobaxterm-keygen

MobaXterm Keygen Originally by DoubleLabyrinth

mojos

ncore

A RISC-V processor in system verilog

nyuziprocessor

GPGPU microprocessor architecture

openc910

OpenXuantie - OpenC910 Core

ordered-map

A HashMap ordered by value

proc-macro-workshop

Learn to write Rust procedural macros  [Rust Latam conference, Montevideo Uruguay, March 2019]

r8051

8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.