Comments (2)
Indeed, Migen is a python module, you can then use pip or any other tool able to process setuptools meta data (in setup.py).
If you want to contribute, then the best way to install it is using : python3 ./setup.py develop --user
There is a documentation for Migen, which contains an "install" instruction : https://migen.readthedocs.org/en/latest/introduction.html#installing-migen
It states that for simulation, you also need to install the VPI module.
Migen can also be installed via conda : https://binstar.org/fallen/migen
However, as the migen conda package is not update automatically yet, it can be outdated and you should prefer the "install from git clone" solution.
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There currently still isn't a clear path from the README.md in the misoc directory to the install instructions at https://migen.readthedocs.org/en/latest/introduction.html#installing-migen
See m-labs/migen#13
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Related Issues (20)
- Wrong version in `setup.py`
- different clocking of differentiator and integrator HOT 3
- misoc@2022-04-07 fail with either latest migen built from source (2022-09-02) and with migen 0.9.2 HOT 1
- pip install of tag 0.12 fails HOT 5
- fix liteeth error counter atomicity problem HOT 2
- liteeth: remove dw parameterization HOT 2
- liteeth: rename dv to rx_dv
- liteeth: remove MII clock output
- clean up memory regions, names, offsets
- kasli/spi_flash: investigate and implement quad i/o read
- DDR3-related error in Vivado timing report for Ultrascale HOT 1
- spi: first half-cycle (setup period) of a chained, pure read uses the write divider instead of the read divider
- Record.connect return value not used HOT 3
- Binutils compilation
- Standard 1 bit SPI mode for spi_flash not available? HOT 2
- software not rebuilt after gateware change
- fix or remove Ultrascale SDRAM init HOT 4
- Wanted to Build a small SoC HOT 1
- CSRStorage with write_from_dev=True seems broken in simulation HOT 3
- register_rom weirdness HOT 2
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