mahirjain25 / dds-mini-project Goto Github PK
View Code? Open in Web Editor NEWDigital simulation of an Automated Hospital Management System.
Digital simulation of an Automated Hospital Management System.
Dequeue correctly identified for a SINGLE CLOCK CYCLE. After running clock few times, the enable is activated for wrong array, giving output in wrong place.
The adder-subtractor is working fine. So is the comparator. The flip flops behave normally till they store 5, and then they reset. Needs to be fixed.
Simple array we can try first.
Implement the Main-Circuit (from Logisim) in Verilog.
Needs to be done in dataflow and behavioural models.
We need it to count down after it is full. At present, for enqueue, counter works properly.
@suraj44 , help needed here.
@suraj44 use the circuit, I have labeled where to put which input. Use the enable pin for logic checks. When enable is 1, the clock will trigger changes.
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