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This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

License: Other

Makefile 3.65% Python 3.50% SystemVerilog 43.46% Tcl 20.48% Verilog 2.58% Shell 0.46% C 18.11% GDB 0.03% Assembly 0.34% C++ 7.35% Emacs Lisp 0.03%

pulpissimo's Introduction

Hi there, I am Mahmoud Magdi 👋

👨🏻‍💻 About Me

I am a passionate and extremely motivated Digital IC Design Engineer with interests in the field of Digital IC Design, Verification, ASIC Physical Implementation, and Computer Architecture.

With about 1 year of industry experience, my expertise lies in designing and verifying complex digital integrated circuits, ensuring their functionality, performance, and reliability.

I am dedicated to delivering innovative solutions and collaborating with cross-functional teams to bring ideas to life.

Continuous learning is not just a goal; it's a mindset that I bring to every project. I am regularly trusted to deliver on the toughest designs because I enjoy finding new approaches and I do not give up!

🤔 My interests are with Digital IC Front-End Design, Verification, and ASIC Implementation
💬 Ask me about anything, I am happy to help;
📫 If you have a project, I'm available to help and also I'm looking for a new opportunities, you can always contact me.