This repository will maintain simulation files and other relevant files of the SAR ADC block worked on in the VSD Summer Online Internship 2020

Note: Circuit requires further optimization to improve performance. Design yet to be modified.

• A Glance at the ADC IP
• Block Diagram of the SAR ADC IP
• Internal Block Diagram of the SAR ADC IP
• Performance Parameters of the SAR ADC
• Subcircuits within the SAR ADC
  • Circuit Diagram of Sample & Hold
  • Circuit Diagram of Clock Divider
  • Circuit Diagram of Comparator
  • Circuit Diagram of R-2R DAC
  • Circuit Diagram of SAR Logic
• Layout
  • Layout of Complete SAR ADC
  • Layout of Sample & Hold
  • Layout of Clock Divider
  • Layout of Comparator
  • Layout of R-2R DAC
  • Layout of SAR Logic
• Running the Simulation
• Pre-Layout Simulation
• Post-Layout Simulation
• Open-Source VLSI Tools
  • About Ngspice
  • About Magic
• Issues | Improvements | Future Work
• Acknowledgments
• Contact Information

The Design Specifications of the ADC IP can be found here.

The SAR ADC is built using 5 important blocks:

1. Anti-Aliasing Filter
2. Sample and Hold
3. Comparator
4. SAR
5. DAC

To enter the Ngspice Shell, open the terminal & type:

$ ngspice

To simulate a netlist, type:

ngspice 1 ->  source <filename>.cir

You can exit from the Ngspice Shell by typing:

ngspice 1 ->  exit

or

ngspice 1 ->  quit

To clone the Repository and download the Netlist files for Simulation, enter the following commands in your terminal.

$  sudo apt install -y git
$  git clone https://github.com/ADC-TEAM2020/SAR_ADC
$  cd SAR_ADC/Simulation/PreLayout_v1.0/

 Open the sar_adc.cir file and enter the input voltage [0V-3.3V] as shown in the image below.

Run the netlist file using the following command.

$  ngspice sar_adc.cir

Observe the corresponding Digital Output when EOC[End-of-Conversion Signal] is HIGH between 11.5us -12.0us

Vin = 2000mV
Digital Code= 1001101101 (621)

Max DNL Error = 7.663975155279 LSB

To be recomputed using Best Fit Curve method, accounting for gain and offset error

To be recomputed using Best Fit Curve method, accounting for gain and offset error

Ngspice is an open source mixed-signal circuit simulator.

Open your terminal and type the following to install Ngspice

$  sudo apt-get install -y ngspice

Magic is a VLSI layout tool.

Type the following to install Magic in Ubuntu

$  wget http://opencircuitdesign.com/magic/archive/magic-8.3.54.tgz
$  tar xvfz magic-8.3.54.tgz
$  cd magic-8.3.54
$  ./configure
$  sudo make
$  sudo make install

1. Script to automate DNL/INL Calculations completely will be developed.
2. Layout will be redone following recommended Mixed Signal Layout practices.
3. INL will be recalculated using the Best Fit Curve method, accounting for gain and offset error.
4. DNL error for lower digital codes needs to be reduced.
5. Sample & Hold must be optimized to improve hold capabilty.
6. Comparator design should be modified to reduce Deadband and Offset.
7. Opamp to be used in DAC must be optimized to give a better transient response and higher Bandwidth.
8. The number of transistors used in a SAR logic must be reduced. The Non-Redundant Successive Approximation Register architecture, which requires only 'N' D flip flops for N-bit conversion, can be employed for this.
9. Anti-Aliasing Filter yet to be designed.

• Sheryl Serrao
• Ananya Ghorai
• Shalini Priya
• Uday Vempalli
• Kunal Ghosh

• Kunal Ghosh, Co-founder, VSD Corp. Pvt. Ltd.
• Philipp Gühring, Software Architect, LibreSilicon Assocation
• Saroj Rout, Associate Professor & Chief Mentor of VLSI Center of Excellence SIT, Bhubaneswar, India
• Santunu Sarangi, Asst. Professor, SIT, Bhubaneswar, India
• Tim Edwards, Senior Vice President of Analog and Design at efabless corporation

• Sheryl Serrao, Undergraduate Student, Mumbai University [email protected]
• Ananya Ghorai, Pursuing M.Tech in VLSI Design, IIT(ISM) Dhanbad, [email protected]
• Shalini Priya, M.Tech Embedded System, NIT Jamshedpur [email protected]
• Uday Vempalli, Undergraduate Student,Siddhartha Institute Of Technology,[email protected]
• Kunal Ghosh, Co-founder, VSD Corp. Pvt. Ltd. [email protected]
• Philipp Gühring, Software Architect, LibreSilicon Assocation [email protected]