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Mulat Ayinet 's Projects

camuy icon camuy

Fast evaluation of CNNs on configurable systolic arrays based on abstract metrics

cnn-fpga-1 icon cnn-fpga-1

使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用

cnn_accelerator icon cnn_accelerator

【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器

cnn_open icon cnn_open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

ddfs icon ddfs

Direct digital frequency synthesizer in Verilog and VHDL.

lenet-5-quantized icon lenet-5-quantized

This is an implementation for the LeNet-5 Network with a script for quantizing its weights to 8 bit unsigned integer

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