2-bit full adder
Description A 2-bit full adder and test bench using Verilog.The 2-bit adder is consisted of 2 1-bit adder using structural modeling. The first adder ultizes "and" and "or" gates while the second adder ultizes 4:1 multiplexer.
Purpose This code is synthesized to build an 2-bit adder using "and", "or" gates and 4:1 multiplexer.