minres / hifive1-vp Goto Github PK
View Code? Open in Web Editor NEWA Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS
License: BSD 3-Clause "New" or "Revised" License
A Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS
License: BSD 3-Clause "New" or "Revised" License
Is it possible to include a simple “hello world” application that is automatically build in the repository so that the simulator can be easily tested after building? Alternatively, can a short tutorial for this be included?
Many regards and many thanks in advance
Hello,
I tried to build the VP but I got the following error when used MAKE_FLAGS="-j4" cmake ..
:
ERROR: Permission denied for user: 'None'. [Remote: minres]
According to https://jfrog.com/blog/into-the-sunset-bintray-jcenter-gocenter-and-chartcenter/ the bintray services have been discontinued. Is there any update on how I can build the project?
Many regards and many thanks in advance.
Hello,
In what timing abstraction does the RISC-V ISS work? Does it assume a fixed delay per instructions or has different delays per instructions? Are some features of a microarchitecture simulated e.g., branch predictions? Where are these parameters (delays) defined? I have found the Plugin cycle_estimate
class I don’t understand how the delay is extracted from the properties taken
and not_taken
.
Furthermore, I want to ask, which transaction abstractions are supported. I find the usage of nb_transport
and b_transport
in the source code. Does DBT-RISE-RISCV support both, SystemC loosely timed and approximately timed modelling styles? In the build directory I also find the executable axi_pinlevel_example
. It seems that the AXI bus is simulated on a even lower abstraction level there.
Best regards and many thanks in advance
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