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View Code? Open in Web Editor NEWA circuit toolkit
License: MIT License
A circuit toolkit
License: MIT License
Hello
During compilation make revkit command, i am facing some problems which is listed below..
The problem may be due to boost installation. I have installed boost 1.54, not able to get the boost 1.56.0 version. Please help me out.
hari@hari-Vostro-A840:$ cd cirkit/cirkit$ cd build
hari@hari-Vostro-A840:
hari@hari-Vostro-A840:/cirkit/build$ cmake -Denable_cirkit-addon-reversible=ON -Denable_cirkit-addon-formal=ON ../cirkit/build$ make external
-- Boost version: 1.54.0
-- Found the following Boost libraries:
-- unit_test_framework
-- regex
-- filesystem
-- graph
-- program_options
-- system
-- timer
-- thread
-- GMP libs: /usr/local/lib/libgmp.so /usr/lib/i386-linux-gnu/libgmpxx.so
-- Configuring done
-- Generating done
-- Build files have been written to: /home/hari/cirkit/build
hari@hari-Vostro-A840:
[ 18%] Built target revlib_circuits
[ 36%] Built target cudd
[ 54%] Built target z3ep
[ 72%] Built target minisat
[ 81%] Built target abc
[100%] Built target revlib_functions
[100%] Build external dependencies
[100%] Built target external
hari@hari-Vostro-A840:/cirkit/build$ make revkit/cirkit/build$
Scanning dependencies of target puma
[ 0%] Building CXX object lib/CMakeFiles/puma.dir/__/cmake/nothing.cpp.o
[ 0%] Building CXX object lib/CMakeFiles/puma.dir/puma/puma.cpp.o
[ 0%] Building CXX object lib/CMakeFiles/puma.dir/puma/tc_time.cpp.o
Linking CXX shared library libpuma.so
[ 0%] Built target puma
[ 0%] Built target lscli
Linking CXX shared library libcirkit_core.so
[ 10%] Built target cirkit_core
[ 10%] Building CXX object src/CMakeFiles/cirkit_classical.dir/classical/dd/arithmetic.cpp.o
/home/hari/cirkit/src/classical/dd/arithmetic.cpp: In function ‘std::vectorcirkit::bdd cirkit::bdd_subtract(const std::vectorcirkit::bdd&, const std::vectorcirkit::bdd&)’:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:60:68: error: no matching function for call to ‘counting_range(long unsigned int, std::vectorcirkit::bdd::size_type)’
for ( const auto& i : boost::counting_range( 0ul, minuend.size() ) )
^
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:60:68: note: candidates are:
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:27:5: note: template boost::iterator_rangeboost::counting_iterator boost::counting_range(Value, Value)
counting_range(Value first, Value last)
^
/usr/include/boost/range/counting_range.hpp:27:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:60:68: note: deduced conflicting types for parameter ‘Value’ (‘long unsigned int’ and ‘unsigned int’)
for ( const auto& i : boost::counting_range( 0ul, minuend.size() ) )
^
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:37:5: note: template boost::iterator_range<boost::counting_iterator<typename boost::range_value::type> > boost::counting_range(const Range&)
counting_range(const Range& rng)
^
/usr/include/boost/range/counting_range.hpp:37:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:60:68: note: candidate expects 1 argument, 2 provided
for ( const auto& i : boost::counting_range( 0ul, minuend.size() ) )
^
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:50:5: note: template boost::iterator_range<boost::counting_iterator<typename boost::range_value::type> > boost::counting_range(Range&)
counting_range(Range& rng)
^
/usr/include/boost/range/counting_range.hpp:50:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:60:68: note: candidate expects 1 argument, 2 provided
for ( const auto& i : boost::counting_range( 0ul, minuend.size() ) )
^
/home/hari/cirkit/src/classical/dd/arithmetic.cpp: In function ‘std::vectorcirkit::bdd cirkit::bdd_abs(const std::vectorcirkit::bdd&)’:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:73:62: error: no matching function for call to ‘counting_range(long unsigned int, std::vectorcirkit::bdd::size_type)’
for ( const auto& i : boost::counting_range( 0ul, n.size() ) )
^
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:73:62: note: candidates are:
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:27:5: note: template boost::iterator_rangeboost::counting_iterator boost::counting_range(Value, Value)
counting_range(Value first, Value last)
^
/usr/include/boost/range/counting_range.hpp:27:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:73:62: note: deduced conflicting types for parameter ‘Value’ (‘long unsigned int’ and ‘unsigned int’)
for ( const auto& i : boost::counting_range( 0ul, n.size() ) )
^
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:37:5: note: template boost::iterator_range<boost::counting_iterator<typename boost::range_value::type> > boost::counting_range(const Range&)
counting_range(const Range& rng)
^
/usr/include/boost/range/counting_range.hpp:37:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:73:62: note: candidate expects 1 argument, 2 provided
for ( const auto& i : boost::counting_range( 0ul, n.size() ) )
^
In file included from /home/hari/cirkit/src/classical/dd/arithmetic.cpp:21:0:
/usr/include/boost/range/counting_range.hpp:50:5: note: template boost::iterator_range<boost::counting_iterator<typename boost::range_value::type> > boost::counting_range(Range&)
counting_range(Range& rng)
^
/usr/include/boost/range/counting_range.hpp:50:5: note: template argument deduction/substitution failed:
/home/hari/cirkit/src/classical/dd/arithmetic.cpp:73:62: note: candidate expects 1 argument, 2 provided
for ( const auto& i : boost::counting_range( 0ul, n.size() ) )
^
At global scope:
cc1plus: warning: unrecognized command line option "-Wno-c++98-compat" [enabled by default]
make[3]: *** [src/CMakeFiles/cirkit_classical.dir/classical/dd/arithmetic.cpp.o] Error 1
make[2]: *** [src/CMakeFiles/cirkit_classical.dir/all] Error 2
make[1]: *** [addons/cirkit-addon-reversible/programs/CMakeFiles/revkit.dir/rule] Error 2
make: *** [revkit] Error 2
hari@hari-Vostro-A840:
I have installed revkit v1.3 with all its dependencies and my aim is to write a code in ipython. But while importing revkit module in the very first line in ipython3 it shows an error shown in the attached image.
I also want to know if this still doesnt work, is there any other approach I can try and can review what built-in methods are available in revkit as it will help me in writing my code.
Thanks!
I've been trying to convert a simple .real file to a .spec using read_real, convert --circuit_to_spec and write_spec. The circuit consists of only one negative control Fredkin gate (size 3). The . real file is the following
# Function: Fredkin gate
# Used Library: MCT (gates: 1, quantum costs: 7)
# This file have been taken from RevLib (www.revlib.org).
.version 1.0
.numvars 3
.variables a b c
.inputs a b c
.outputs a b c
.constants ---
.garbage ---
.begin
f3 -c a b
.end
When I run 'convert --circuit_to_spec', the program lauches the following error code and exits revkit.
revkit: /cirkit/addons/cirkit-addon-reversible/src/reversible/simulation/simple_simulation.cpp:65: boost::dynamic_bitset<>& cirkit::core_gate_simulation::operator()(const cirkit::gate&, boost::dynamic_bitset<>&) const: Assertion `v.polarity()' failed.
Aborted (core dumped)
I assumed that, as RevKit does not show any warning when reading the file and can print the circuit in the console line, that it supported negative controls for this kind of gates, but it can not simply simulate it.
Is there a way to achieve this conversion to a .spec file?
Command 'show' throws std::out_of_range when is called without passing arguments.
test.v:
module test (a, b, c);
input a, b;
output c;
assign c = a | b;
endmodule
cirkit> read_verilog --xmg test.v
cirkit [xmg]> show
terminate called after throwing an instance of 'std::out_of_range'
what(): _Map_base::at
When I try to write_verilog
from any format some nodes appear with empty names.
I think these nodes represent the inputs and outputs (as they also are empty on the module signature).
An example in MIG format is attached.
Thanks in advance!
I'm trying to install the latest version of cirkit on an Anaconda3 that is installed in my linux system. I've installed the three packages mentioned in the requirements and am using gcc/g++-8.1 and python3.6. In the attachment, you can see pictures of the result for "cmake .." and then "make cirkit".
Please let me know how I can fix this. Thanks
Hi, Mathias,
Although the revkit has the read_verilog command, when i use it, however, it says exactly one store must be specified. It works fine with pla file.
Is the usage of read_verilog correct ? or something else?
Thank you!
I get the following error on running make external.
@msoeken Kindly help me
Hi, I have a question I'd like to ask. When I was testing the command exact_mig I found the function :
M'(M'(D,B,M(0,D',C)),M(B,A,M'(0,D',C)),M(B,A',M(0,C,B'))) that covers the minterms (0,1,6,10,13,14,15).
How should I calculate the cost ? Should I count the primitive M(0,D',C) two times or only one ?
The way I'm calculating the cost is:
7 gates, 12 input variables and 7 inverters.
For example, using another program I found the function:
M(M(M'(A,B,1),C',0),M(M(1,C,D),M(A,B,D'),0),1)
With 6 gates, 8 input variables and 3 inverters.
I would like to know if I'm calculating the cost correctly, and if in fact the second function is better than the first one. Thank you for your help.
@msoeken help
There are several issues are arisen during working with revkit, mentioned as follows:
Please solve the issues, it will be very beneficial to me and my research work.
Hi,
I am trying to install revkit on RedHat linux 4.4.7.
I am using GCC/4.9.2 , boost/1.60 , git/2.93 , cmake version 3.6.1 and python/3.6.3.
When I run make external I get error saying:
ValueError: zero length field name in format.
I was able to successfully install on Ubuntu 16.04 before, but now I am working on college server. What could be going wrong? Thanks in advance.
P.S. I used the revkit version available currently on the github.
Dear Professor Mathias Soeken,
I have the following problem when installing revkit:
https://cirkit.readthedocs.io/en/latest/installation.html
Follow this link to install, when I input “ make revkit”, the following error occurs
Hi Mathias,
I was wondering if there is a tool on RevKit that can limit the number the synthesis of a circuit to a certain number of control signals via MCT gates. For instance if in a circuit after synthesizing by default, we have MCT gates with 10 control lines. But We want that control signals of all MCT gates don't exceed 5 control signals. Is it possible to do so using RevKit?
In other words, we want to break down the 10 control signal toffoli and substitute it with its 5 control signals MCT gates.
I also wanted to thank you for your time on answering my posts. Thanks for your great support on the software.
The latest version of Z3 4.7.1 does not define __uint64, which was previously defined in the z3_api.h.
Please update the documentation to reflect the exact version of z3 which is compatible with revkit.
I can't use Revkit's Python API. When I try to import the package with import revkit
, I get the ImportError: No module named revkit
error. I have tried to do this from Python 3.5.2 and Python 2.7.12, and I get the same error in both distributions.
As the Jupyter Notebook demonstration states, I have set the PYTHONPATH
environment variable to $CIRKIT_HOME/build/programs.
I attach a screenshot of my terminal and executions for more clarity.
Hi
I am facing two small issues regarding revkit
1) What is the procedure for ESOP based synthesis??
for example
In case of tbs we have to perform
pla to bdd
bdd to rbdd
tbs
what we do for esopbs???
please share any sample program (*.cs file or list of instructions) for esopbs.
2) Another issue is regarding creating truth table from circuit.
The command "circuit > spec" not performing and at the output, it is written "unknown command: circuit". The error is occurring also in the example 4 (create random circuit) of demo.cs
Please solve the issues.
Hello,
Thank you for all your support on the package. I had a few questions.
I'm trying to read a verilog description of an adder "RCA_N16.v" and the package seems to be having trouble with it. It is from the adder library associated with one of your papers.
I'm writing it simply as read_verilog -a RCA_N16.v
Furthermore, in your paper "BDD Minimization for Approximate Computing" you develop a great methodology for automatically approximating circuits. I installed the package and I see this command.
However, does the error metric calculation happen within the comb_approx command? As in, is it not a separate command? So if I wanted to run it on two circuits (an original and an approximated), I cannot do this with CirKit?
This question is mostly about the error rate and average-case error metrics of your paper.
Thanks once again for the great product. The file is attached for reference.
RCA_N16.txt
Hi Mathias,
Is it possible to run revkit tool on multiple cores? It takes a lot of time to generate reversible circuit for 14+ inputs from pla file. Thanks in advance.
I am using Revkit tool to re-synthesize reversible circuits.
I am able to use transformation based synthesis using "spec file" and "tbs" command.
I am able to perform bdd using "embed -b" with "tbs" command (feeding pla file).
And quantum-based synthesis (white dots) using "qbs" command (feeding pla file as input).
However, I am not sure how to perform esop synthesis in revkit. Could you please give me an example? Also, I hoping my above-mentioned commands are right, if not please correct me. Further, I am aware of only these 4 synthesis techniques in revkit. If there are more kindly guide me through it. Sorry for many questions. Thanks in advance.
Hello Sir,
I have installed the Revkit tool using the steps given in README file. I wish to draw a Quantum circuit (using BDD synthesis). But i couldn't find any executable file in revkit_viewer(which is in the build directory within gui)
. I herewith attached the image which i have done so far. Kindly sort out the problem.
Dear Mathias,
I'm using the benchmark called 3_17 which according to the revkit it is synthesized using Transformation based synthesis technique. I tried the pla format of the same benchmark and after synthesizing it using the tbs command the circuit size was more than twice of the size of the circuit on Revlib. If it is possible please tell me where I'm going off that this is happening.
For instance the RevLib benchmar utilizes 6gates to produce the same circuit but when I synthesize it, it become 11 gates. How can I achieve the same circuit using the pla format the circuit?
Thanks.
There is a bug in the rec
command. I tried to use it, after installing cryptominisat and adding its executable to PATH, but it returns an error related to an option called with which cryptominisat5
is executed.
After investigating the source code, I found that the rec
command calls a C++ program called xor_equivalence_check
, located in $CIRKIT_HOME/addons/cirkit-addon-reversible/src/reversible/verification/xorsat_equivalence_check.cpp
This C++ program calls the cryptominisat5
executable with a flag --autodisablegauss 0
(as you can see here ) that it is no longer supported by cryptominisat.
After removing that part from the line in the C++ program and rebuilding revkit, I was able to execute the rec
command.
Please change that line. I am not able of making a pull request due to problems in mi git configuration and my computer.
Hi,
I checked the tweedledum which powers the Revkit V3. And I found out tweedledum utilizes multi-target toffoli gates. I was wondering how can I manipulate a synthesis technique to just use toffoli's with targets more than 1?
If it is not possible to do so through Revkit shell how how can I manipulate the codes to have just toffolis with targets more than 1?
Thanks,
--Sajad
@msoeken pls help
I am not able to install the python interface. When running the cmake -Dcirkit_ENABLE_PYTHON_API=ON ....
comman, I get the following error:
I thought it was related to a faulty Cmake installation, but I have reinstalled it and it continues to fail. I installed pybind11 in python3 using pip install pybind
. I have also downloaded their github repository and ran the make commands that are posible to build there. I am also able to run the (cmake example)[https://github.com/pybind/cmake_example] provided by pybind, so I don't think that this is just a problem of my system.
I have also tried to make the recommendations that the error message displays and I face similar errors when I do it.
Environment:
system: CentOS Linux release 7.8.2003 (Core)
cmake version 3.18.2
clang version 7.0.1 (tags/RELEASE_701/final)
compiler: gcc (GCC) 7.3.1 20180303 (Red Hat 7.3.1-5)
@msoeken kindly help. Thank you.
When '# cmake ..'
Performing Test HAS_WNO_gnu-anonymous-struct - Failed
Performing Test HAS_WNO_nested-anon-types - Failed
Performing Test CMAKE_HAVE_LIBC_PTHREAD - Failed
When '# make cirkit', it reports errors about 'undefined references to ...'.
CMakeFiles/cirkit.dir/cirkit.cpp.o: In function void alice::write<std::shared_ptr<mockturtle::mapping_view<mockturtle::names_view<mockturtle::aig_network>, true, false> >, alice::io_verilog_tag_t>(std::shared_ptr<mockturtle::mapping_view<mockturtle::names_view<mockturtle::aig_network>, true, false> > const&, std::string const&, alice::command const&)': cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11aig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11aig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x42): undefined reference to
std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()'
cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11aig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11aig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x52): undefined reference to std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()' CMakeFiles/cirkit.dir/cirkit.cpp.o: In function
void alice::write<std::shared_ptr<mockturtle::mapping_view<mockturtle::names_viewmockturtle::mig_network, true, false> >, alice::io_verilog_tag_t>(std::shared_ptr<mockturtle::mapping_view<mockturtle::names_viewmockturtle::mig_network, true, false> > const&, std::string const&, alice::command const&)':
cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11mig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11mig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x42): undefined reference to std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()' cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11mig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11mig_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x52): undefined reference to
std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()'
CMakeFiles/cirkit.dir/cirkit.cpp.o: In function void alice::write<std::shared_ptr<mockturtle::mapping_view<mockturtle::names_view<mockturtle::xag_network>, true, false> >, alice::io_verilog_tag_t>(std::shared_ptr<mockturtle::mapping_view<mockturtle::names_view<mockturtle::xag_network>, true, false> > const&, std::string const&, alice::command const&)': cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11xag_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11xag_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x42): undefined reference to
std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()'
CMakeFiles/cirkit.dir/cirkit.cpp.o:cirkit.cpp:(.text._ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11xag_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE[_ZN5alice5writeISt10shared_ptrIN10mockturtle12mapping_viewINS2_10names_viewINS2_11xag_networkEEELb1ELb0EEEENS_16io_verilog_tag_tEEEvRKT_RKSsRKNS_7commandE]+0x52): more undefined references to `std::vector<std::pair<std::string, unsigned int>, std::allocator<std::pair<std::string, unsigned int> > >::vector()' follow
collect2: error: ld returned 1 exit status
make[3]: *** [cli/CMakeFiles/cirkit.dir/build.make:104: cli/cirkit] Error 1
make[2]: *** [CMakeFiles/Makefile2:257: cli/CMakeFiles/cirkit.dir/all] Error 2
make[1]: *** [CMakeFiles/Makefile2:264: cli/CMakeFiles/cirkit.dir/rule] Error 2
make: *** [Makefile:150: cirkit] Error 2
Hi Mathias,
I have another question about the Revkit. Is there any possibility that I would be able to synthesize a given truth table using read_spec or any other read input command to give a truth table to the Revkit while some of the inputs / outputs are don't cares. For say I want to synthesize a truth table with 4 bits input and output using TBS technique which 8 of the inputs/outputs won't happen in my case so they are don't cares.
Thanks.
Hello Mathias,
I was wondering if it is possible to choose a specific gate library to synthesize a circuit with it. For instance
for this circuit
read_spec -p "0 1 2 3 4 5 6 15 8 9 10 11 12 13 14 7"
which respond to a multi control Toffoli (3 control lines). How can I synthesize this simple circuit using just NCT using Revkit?
Thanks
I get the following error on running make cirkit.
@msoeken Kindly help
Hi Dr. Soeken,
I am trying to use comb_approx for bdd rounding (developed in maniac), but its not working for me. Couldn't find the command in cirkit 3.0. It isn't working on cirkit 2.0 either. Command "cirkit> comb_approx -b -m 2 -l 3" results in "[e] not implemented yet, use approximate_bdd program". Uncommented line 17-31 in programs/CMakeList.txt to build approximate_bdd, but got the following error about the missing header file "core/utils/program_options.hpp", which wasn't available in any directory.
I would appreciate if you could look into the issue.
Best
Amad
Just to point out that you probably wanted to write :
export PATH=<path-to-cirkit>/ext/bin:$PATH
instead of
export PATH=<path-to-cirkit>/ext/bin:PATH
Because some people like me are lazy and don't look at what I'm copying and pasting...
Cheers
If I try to open an AIG from a verilog file, if there's a statement in the format a = b & ~c
, it ends with Cannot read name in assign-statement.
If I change it to a = ~b & c
it does work
Hi Mathias,
I tried to synthesize using command like embed -b, tbs -b from the following pla files where dont cares have a different position.
-00 00
-01 01
-10 11
-11 10
and
00- 00
01- 01
10- 11
11- 10
But the synthesized circuits are very different. The second seems very simple while the first is complicate. Can you explain how this happen? When i want to add ancillary or dont care values to functions that are already reversible, how can i avoid this kind of stuff, i.e., to avoid the synthesized circuits to be complicate so that the overhead is small and meanwhile to avoid the dont care or constants in the circuits are directly noticed.
Hi Mathias,
Thanks for your response.
In case of truth table for synthesize in Pla file, I have another question.
Still the function
00 00
01 01
10 11
11 10
Please refer to the pic in the link. The third bit in inputs are the added ancillary input. Both two attempts guarantee that the function is correct when the added ancillary input=0, the first attempt has a complete truth table. In the second attempt, I just guarantee the function is correct with a incomplete truth table. You see that the overhead of the two synthesized circuits are very different though they use the same commands for synthesis. Why cant the second have the same overhead with the first one? Is it related with the synthesis methods or Is there any other synthesis methods in the tool kit that can achieve the less overhead for the second attempt?
Best regards
Is there a way to export the store content?
test.v:
module test (a, b, c);
input a, b;
output c;
assign c = a | b;
endmodule
cirkit> read_verilog --xmg test.v
cirkit [xmg]> show --silent out
(out is an empty file)
cirkit [xmg]> print --xmg
(empty line)
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