Comments (1)
Ok, I've done some more prying, please do correct me if I'm wrong:
The LMS chip sends IQ data alternatively through LMS_DIQ2_D[11..0]
, with LMS_DIQ2_IQSEL2
telling whether the current data is 0: I
or 1: Q
(or reversed, can't tell that much yet). This pretty much answers my question about multiplexing, I guess, so no need to bother with it anymore. I presume the quadrature is calculated using the center frequency that would be set from GNU Radio?
Wouldn't intercepting that bus between the input and the rx_path
element from the Stream out buffer
section to apply processing to it be the simplest way for me to do whatever math I feel like doing before sending it to GNU Radio?
As I haven't done much DSP on FPGAs before, would anyone have some tips to give me on implementing an IQ FIR filter on FPGA? It seems the ones available in the IP catalog I have are made to work with real signal.
Again, thanks for any help you find time to provide.
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