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MIPS_Micro

This project is a VHDL implementation of a MIPS microprocessor. The following instructions are supported:

R-Type: add, and, div, nor, or, sub, mult, slt I-Type: addi, beq, lw, sw J-Type: j

They processor is setup with 32KB of BRAM and is designed to work with programs that are assembled with MARS (MIPS Assembler and Runtime Simulator), which can be found here: http://courses.missouristate.edu/kenvollmar/mars/ When using MARS you must change the Memory Configuration to use "Compact, Text at Address 0". Once programs are assembled you can dump the memory using the "Hexadecimal Text" format into a file. Once you have the memory dump in hex format you can paste it into a .coe file to be loaded into the BRAM on initialization. You will then need to regenerate the memory core and processor core.

The current project is setup to run on a Digilent Nexys3 board. It runs at a clock speed of 50MHz (a step down from the native 100MHz clock on the Nexys3 board due to timing issues with writting and reading from memory when running at 100MHz). The following components are memory mapped and can be read/written to: LEDs - 0x7F00 Switches - 0x7F04 Buttons - 0x7F08