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stm32-eth's Introduction

CI GitHub release License C++

Ethernet connectivity for Stm32F4 Boards using W5100 Ethernet controller.

• Requirements

• Testing

Build and execute Unit Tests:

mkdir build && cd build
cmake ..
make
make unittest

Executing tests using CTest: make test or ctest. For unittest it's possible to switch verbosity by CMake option.

• Integration Test

Integration Test for Stm32F4 are enabled by the INTEGRATIONTEST option. The target stm32-eth-it is available as ELF (default) and HEX.

• Flashing (OpenOCD)

Both ELF- and HEX-files can be flashed using OpenOCD:

$ openocd -f stm32f4discovery.cfg
$ telnet localhost 4444
> reset halt
> flash write_image erase <filename.[elf|hex]>
> reset run

• Wiring & Pin Assignment

W5100 Wiring

Connect Reset and 3.3 V with 4.7 kΩ Resistor.

W5100 Pin Assignment

Stm32 Pin Assignment

Pin Stm32
MOSI PB15
MISO PB14
SCK PB13
SS PB12

License

GNU General Public License (GPL)

This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program.  If not, see <http://www.gnu.org/licenses/>.

Third party licenses

The License does not apply to files of system directory. Files included in the system folder are licensed under different conditions – please refer to it's files for more details.

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stm32-eth's Issues

SS Pin is hardcoded

SS Pin is hardcoded. Unlike the MOSI, MISO and CLK it's not configured through thi Spi Config.

Rename Cortex-M source files

Rename Cortex-M source files as their upstream names have changed.

New names:

  • initialize-hardware.c (_initialize_hardware.c)
  • reset-hardware.c (_reset_hardware.c)

Fully utilize C++17 on cpp17 Branch

Fully utilize C++17 on cpp17 Branch, even if some compilers (incl. the target one) can't be used until they fully support the new standard.

Even though a target build isn't possible until ARM releases for arm-none-eabei of GCC7, more advanced C++17 features can be integrated and tested – and eventually get merged into mainline.

Note: The mainline Branches aren't affected by this and still stay on C++14.

Safe to use '-fno-use-cxa-atexit'?

Safe to use -fno-use-cxa-atexit?

Gcc Manual:

-fuse-cxa-atexit Register destructors for objects with static storage duration with the _cxa_atexit function rather than the atexit function. This option is required for fully standards-compliant handling of static destructors, but only works if your C library supports _cxa_atexit.

Conflicting definition of cortex m4 macros on Gcc5

Ci builds of Gcc5 fail because of a conflicting definition of __I and __O.


Cortex M4 files (core_m4.h) define __I / __O as follows:

#ifdef __cplusplus
  #define   __I     volatile             /*!< Defines 'read only' permissions */
#else
  #define   __I     volatile const       /*!< Defines 'read only' permissions */
#endif
#define     __O     volatile             /*!< Defines 'write only' permissions */

Same for __O.

Those conflict with identifiers used internally by Gcc 5 (only).

Configurable Spi Pins

The used Spi Pins should be configurable with at least an useful default available to reduce the configuration work.

Move W5100 parts to namespace

All W5100 parts should be moved into a dedicated namespace. Registers (#10) may use another nested one (#20).

Also the "W5100" can be omitted then.

Spi initialisation in ctor

Call the Spi initialisation in the ctor. This ensures it's always setup before any data is transmitted / received.

(Re-)Enable LTO option

(Re-)Enable LTO option. Since not all compilers support it (eg. on CI) – it should be OFF per default.

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