- ๐ I'm @olahiuj
- ๐ญ Recently working on building interpreters and type checkers
- ๐ฑ Currently learning Haskell and Type Systems
- ๐ฌ Ask me about ...
- ๐ซ How to reach me: [email protected]
olahiuj / pyverilog Goto Github PK
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Python-based Hardware Design Processing Toolkit for Verilog HDL
License: Apache License 2.0