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Hello There!

Lucas Teske, born November, 8 of 1991 in São José dos Campos (São Paulo / Brazil). Lives in South of the São Paulo capital and has great interest in tecnological researchs.

It is Creator of OpenSatelliteProject, SegDSP and other stuff.

🇧🇷 ?BRBR? 🇧🇷

Lucas Teske, nascido em 8 de novembro de 1991 em São José dos Campos (São Paulo / Brasil). Vive na região sul da capital de São Paulo e tem um grande interesse em pesquisas tecnológicas.

É o criador do OpenSatelliteProject, SegDSP e outras coisas.

✨ Github Stats ✨

Check out racerxdl's profile on stardev.io Check out racerxdl's profile on stardev.io

👍 LIKES 👍

  • ⚡ High Voltage (Alta tensão)
  • ☢ Chemistry (Química)
  • ⌨ Programming (Programação)
  • ⌨ Hacking
  • 🛰 SDR
  • 🛰 Satellites (Satélites)
  • 🛰 Satellite Dishes (Parabólicas)
  • ⚡ Tesla Coils (Bobinas de Tesla)
  • 🚁 Drones
  • ⌨ FPGA's (Specially the ones supported by YosysHQ)

Contacts / Contatos

Lucas Teske's Projects

coms-1 icon coms-1

Tools for COMS-1 LRIT satellite data

containers icon containers

Building and deploying container images for open source electronic design automation (EDA)

correios icon correios

A golang client for some brazilian post office(correios) services

cura icon cura

3D printer / slicing GUI built on top of the Uranium framework

darkriscv icon darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

dnspy icon dnspy

.NET debugger and assembly editor

docs icon docs

MegaPirateNG Documentation

dos icon dos

D Operating System - Just because HUEBR

dragonfly icon dragonfly

Minecraft Bedrock Edition server software written in Go

esp32-rotracker icon esp32-rotracker

WIP ESP32 Rotor Tracker using stepper motors. Optimized for https://github.com/racerxdl/tmccncboard

esp32-shift icon esp32-shift

ESP32 + 74HC595 Shift Register controlled by Serial Port

ethminer icon ethminer

Ethereum miner with OpenCL, CUDA and stratum support

f2rank icon f2rank

Fiesta 2 Unnoficial Ranking Page Source Code

f32c icon f32c

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

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