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Rhindi Youssef's Projects

inf2015 icon inf2015

Développement de logiciels dans un environnement Agile

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Organisation des ordinateurs et assembleur

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Construction et maintenance de logiciels

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laboratoir inf2015 lire fichier json

mips_pipeline_simulator icon mips_pipeline_simulator

This Project simulates the workings of a 4 stage MIPS PipeLine. The Simulator writes the Cycle Number when an instruction leaves a PipeLine Stage. It detects RAW, WAW, WAR and Structural Hazards Accurately. A two level Memory Hierarchy is also implemented in the PipeLine. Cache hits and Misses for both I-Cache and D-Cache are also written on the Scoreboard.

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