In guide 1 on booting, there is an inconsistency between the text and the picture regarding the MSEL settings.
The picture shows 0b00100, while the text says 0b00101. I believe 0b00100 (picture) is correct.

First off, I really appreciate all work in this repo.

I'm experiencing problem to read/write data on light-weight bridge with HPS while in SSH.

My hardware set-up is DE0 Atlas Nano version C (Cyclone V). My MSEL are set to:

The console output when trying to write the original FPGA binary file is as follows:

Some more info:
When executing a FPGA-readBridge, it times out and the watchdog timer in triggers a reboot of Linux.

Can anyone help me with providing some input on how I'll establish working FPGA-writeBrdge and FPGA-readBridge commands from the HPS.

This is more a question rather than an issue. I'm trying to compile GetStarted without Visual Studio. The example works perfectly well in remote-debugging mode of Visual Studio, but when I try to compile it manually on board, I get a segmentation fault in alt_gpio_init(). It might be due to command line flags that I am using.

The Makefile is:

TARGET = main

ALT_DEVICE_FAMILY ?= soc_cv_av
HWLIBS_ROOT = Linux_alt_lib/altera_hps/hwlib
#CROSS_COMPILE = arm-linux-gnueabihf-
CPPFLAGS = -g -Wall -D$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/ -I.. -Wformat=0 -std=c++11
CCFLAGS = -g -Wall -D$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/ -I.. -Wformat=0
LDFLAGS = -g -Wall -lpthread
CXX = $(CROSS_COMPILE)g++
CC = $(CROSS_COMPILE)gcc
ARCH= arm

CFILES = $(wildcard *.c)
OBJECTS = $(CFILES:.c=.o)

build: $(TARGET)
$(TARGET): main.o $(OBJECTS)
$(CXX) $(LDFLAGS) $^ -o $@
%.o : %.cc
$(CXX) $(CPPFLAGS) -c $< -o $@
%.o : %.c
$(CC) $(CCFLAGS) -c $< -o $@

.PHONY: clean
clean:
rm -f $(TARGET) *.a *.o *~

I compile main.cpp and alt_generalpurpose_io.c

First let me thank you for putting together this very nice solution for developing on DE10* platforms.

I have some issues that I'll split into separate github issues to keep track.

The first one is that on DE10-nano, FPGA-readBridge -hf 0 hangs, right after "Bridge: HPS-to-FPGA". The chip goes into a hard lock, then the watchdog reboots the device after a while. I experience no such issue on DE10-std, though.

Kind regards,
Rok