sergachev / litex-template Goto Github PK

Various pieces and examples that are not in LiteX yet and a reproducible environment to build and use them.

• LiteX-related repositories are registered as git submodules so that their exact versions are tracked
• a poetry environment is used to keep your system and user Python environments clean, therefore you can have multiple such projects using different versions of LiteX repositories etc.
• LiteX-related packages are installed in the development mode so that they can be worked on easily
• simple and compact

• clone this repository recursively
• check the dependencies below
• use one of the following:
  • A complete (gateware + Cortex-A9 firmware) workflow for Zynq-7000 demonstrated on Digilent Zedboard
  • Xilinx KV260 / ZCU216: build all required binaries and run LiteX gateware and BIOS on Zynq Ultrascale+ / Cortex-A53 via JTAG: make -f Makefile.kv260 load (or Makefile.zcu216); use USB-serial terminal on the board (more detailed description coming)
  • Quicklogic Quickfeather - build and flash complete (gateware + BIOS on Cortex-M4) boot images: make -f Makefile.quickfeather flash; serial terminal is on pins J3.2/J3.3
  • Gowin AHB Flash access simulation with LiteX and Verilator
  • other SoC/software/simulation examples in src: new description coming soon

• GNU Make, Ninja, Python 3.9+, poetry (Ubuntu 20.04 and similar: apt install make ninja-build python3.9 python3-pip; pip install poetry)
• For RISC-V cores: RISC-V GNU toolchain (riscv64-elf variant is usually fine)
• For all 32-bit ARM cores: GNU Arm Embedded Toolchain (arm-none-eabi) - 10.3-2021.10 tested
• For 64-bit ZynqMP: GNU Toolchain for the A-profile Architecture (aarch64-none-elf) - 10.3-2021.07 tested
• For Xilinx Zynq(MP) to build U-Boot: GNU Toolchain for the A-profile Architecture (aarch64-none-linux for ZynqMP, arm-none-linux-gnueabihf for Zynq7000) - 10.3-2021.07 tested
• For ZynqMP PMU firmware build: makeinfo, help2man, libtool (apt install texinfo help2man libtool-bin)
• For implementation on Xilinx devices: Xilinx Vivado (2021.2 tested; for some Zynq-related tasks it is convenient to install it as Vitis configuration)
• For implementation on Gowin devices: Gowin EDA
• optional: OSS CAD Suite - yosys for synthesis, OpenOCD and openFPGALoader for programming, verilator and gtkwave for simulations
• see LiteX readme for potential additional requirements like json-c and libevent