silicondosa / frontpanelwrapper Goto Github PK

A simple I/O broker and board manager for the OpalKelly FrontPanel ® FPGA - USB/PCI communication driver

License: MIT License

CMake 0.03% C++ 7.45% Shell 0.02% Verilog 76.96% VHDL 8.63% Java 0.18% Python 0.13% Ruby 0.13% Coq 1.02% C 0.01% Stata 0.63% Batchfile 0.17% Tcl 0.43% SystemVerilog 4.22%

opalkelly frontpanel fpga wrapper

frontpanelwrapper's Issues

Create wrapper for wire in/out functions

Write a routine that can check if the FrontPanel library has been loaded

This check is needed before any independent function is called or class object is defined.

Create a new constructor which can burn a bitfile

Constructor should accept the file location of the bitfile as a parameter and burn it if it is present.
If the file is not present, spit out an error and prevent further use of IO functions.

Run basic frontpanel example and test that it works

Enumerate FrontPanel FPGAs

Create function in wrapper that can enumerate FPGAs

Create an error code parser

Use the enumerated data type 'ok_ErrorCode' in okFrontPanelDLL.h to create an error code parser similar to the one in the the T5-System USC-BBDL repo.

Recommend Projects