sipeed / m1s_bl808_sdk Goto Github PK

        xram_memory (!rx) : ORIGIN = 0x22020000, LENGTH = 16K 

XRAM(EMI)     | 0x40000000            | 16KB  | Shared RAM mainly for data communication among M0/LP/D0                                                   ```

kwang@debian:~/App$ DebugServerConsole 
+---                                                    ---+
|  T-Head Debugger Server (Build: Oct 21 2022)	           |
   User   Layer Version : 5.16.05 
   Target Layer version : 2.0
|  Copyright (C) 2022 T-HEAD Semiconductor Co.,Ltd.        |
+---                                                    ---+
T-HEAD: CKLink_Lite_V2, App_ver unknown, Bit_ver null, Clock 2526.316KHz,
       5-wire, With DDC, Cache Flush On, SN CKLink_Lite_Vendor-rog B4555C.
+--  Debug Arch is RVDM.  --+
+--  CPU 0  --+
RISCV CPU Info:
	WORD[0]: 0x0910090d
	WORD[1]: 0x12046000
	WORD[2]: 0x260c0001
	WORD[3]: 0x30030066
	WORD[4]: 0x42180000
	WORD[5]: 0x50000000
	WORD[6]: 0x60000753
	MISA   : 0x8000000000b4112d
Target Chip Info:
	CPU Type is C906FDV, Endian=Little, Vlen=128, Version is R2S1P6.
	DCache size is 32K, 4-Way Set Associative, Line Size is 64Bytes, with no ECC.
	ICache size is 32K, 2-Way Set Associative, Line Size is 64Bytes, with no ECC.
	Target is 1 core.
	MMU has 128 JTLB items.
	PMP zone num is 8.
	HWBKPT number is 4, HWWP number is 4.
	MISA: (RV64IMAFDCVX, Imp M-mode, S-mode, U-mode)

GDB connection command for CPUs(CPU0):
	target remote 127.0.0.1:1025
	target remote 192.168.0.3:1025

****************  DebuggerServer Commands List **************
help/h
	Show help informations.
*************************************************************
DebuggerServer$ 

kwang@debian:~/App$ DebugServerConsole 
+---                                                    ---+
|  T-Head Debugger Server (Build: Oct 21 2022)	           |
   User   Layer Version : 5.16.05 
   Target Layer version : 2.0
|  Copyright (C) 2022 T-HEAD Semiconductor Co.,Ltd.        |
+---                                                    ---+
T-HEAD: CKLink_Lite_V2, App_ver unknown, Bit_ver null, Clock 2526.316KHz,
       5-wire, With DDC, Cache Flush On, SN CKLink_Lite_Vendor-rog B4555C.
Extra Info: hacr width is 8.
ERROR: Fail to check had module of CPU 0, please check:
	1. the physical connection;
	2. the power of the target;
	3. the link clock (link clock <= (CPU clock/2));
	4. the reference voltage of link, default 3.3v;
For more information, please run Debugserver with connect log:
	 Console: run Debugserver with arguments "--debug connect".
	 UI     : select "Connect" from menu "Setting->Verbose Setting".