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elpapais 6200m

pca9306_level_translator_breakout's Issues

Routing of pads GND(PAD 4), VREF2(PAD7) and EN(PAD8)

Please re-route these nets so that they go directly away from the IC. This helps form better toes on the legs of the IC and ultimately better AOI.

GND is a pour, so you will need to use a small rectangle of trestrict below the pad to prevent auto "routing" (aka thermal ticks) on the bottom side of the pad. Then you will need to manually route GND to the left of the pad.

VREF and EN should be re-routed directly away from IC as well. I know this isn't the shortest route, but it will be worth it. I suggest having the trace "T" or "split" just to the right side of the two legs. This way each pad gets it's own unique trace routed directly away.

Positioning of R1, R2 and R4

Although it's okay to go off grid on tight layouts, it is still important to maintain a very even spacing.

  1. R1 and R2 should be vertically aligned. They should also be spaced with a larger gap horizontally.

Their horizontal spacing is unnecessarily tight. There center points are currently 50 mil apart. This leaves only a hairline amount of mask between them (roughly about 2 mil). This is increasing the potential for jumpers. Whenever possible, we should always go for 60 mil between center points (leaving about 12 mil of mask).

  1. R3 should be vertically aligned with R4 and spaced 60 mil from R4. *Note, after this shift, we may want to space C1 slightly to the right to form even spacing between all components on the right side of this board.

qwiic level translator?

It would be great to have a board like this with qwiic headers on both sides.
I need to connect a 1.8v I2C master to some qwiic sensors and the qwiic cables are so convenient.

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