VSDOpen2020_TLV_RISC-V_Tutorial

For students of the VSDOpen2020 TL-Verilog RISC-V Tutorial, by Redwood EDA.

Promotional video

Course Videos

Videos are available in YouTube. Right-click this playlist and "open in new tab".

Slides

As you listen to videos and do the lab assignments, you can follow along in these slides. Right-click these slides and "open in new tab". Comments may have been added in real time to address points of confusion.

Starting-point code

To begin the labs, right-click this starting-point code and "open link in new tab".

After the Tutorial

Some useful pointers for further exploration (right-click and "open in new tab"):

• Redwood EDA
• Open-source TL-Verilog projects:
  • WARP-V TL-Verilog RISC-V CPU
  • 1st CLaaS Framework for hardware acceleration of web/cloud applications
  • etc...
• Learn TL-Verilog in Makerchip