Board: Nucleo F429zi
IDE: CubeIDE

When the endpoints max packet size equals the data to send size, usbx does not send a zlp, therefore the host does not recognize the transfer as complete.

Reproduce:

1. Ux_Device_CDC_ACM example

2. Change usbx_cdc_acm_write_thread_entry to something like this:

    /* Get the device */
    device = &_ux_system_slave->ux_system_slave_device;
   
    /* Get the data interface */
    data_interface = device->ux_slave_device_first_interface->ux_slave_interface_next_interface;
   
    /* Get the cdc Instance */
    cdc_acm = data_interface->ux_slave_interface_class_instance;
   
    cdc_acm -> ux_slave_class_cdc_acm_transmission_status = UX_FALSE;
   
    buffsize = 0;
    
    for(int i = 0; i < testlength; i++)
    {
    	UserTxBufferFS[i] = '1';
    	buffsize++;
    }
   
    /* Send data over the class cdc_acm_write */
    ux_status = ux_device_class_cdc_acm_write(cdc_acm,
    								(UCHAR *)UserTxBufferFS,
    								buffsize, &actual_length);
   
    /* Check if dataset is correctly transmitted */
    if (ux_status)
    {
    	tx_thread_sleep(100);
    }
    tx_thread_sleep(100);
   

3. Set testlength to endpoints max packet size

4. Host wont recognize data

Analysis:

After investigation i found several issues,

host_length != slave_length will be false even if zlp is needed

even if
transfer_request -> ux_slave_transfer_request_force_zlp gets set to UX_TRUE the zlp wont be sended because its exclusive to endpoint 0, see:

when removed the host_length != slave_length in issue one and use this code for HAL_PCD_DataInStageCallback its working:

void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
{

UX_SLAVE_DCD            *dcd;
UX_DCD_STM32            *dcd_stm32;
UX_DCD_STM32_ED         *ed;
UX_SLAVE_TRANSFER       *transfer_request;
ULONG                   transfer_length;
UX_SLAVE_ENDPOINT       *endpoint;


    /* Get the pointer to the DCD.  */
    dcd =  &_ux_system_slave -> ux_system_slave_dcd;

    /* Get the pointer to the STM32 DCD.  */
    dcd_stm32 = (UX_DCD_STM32 *) dcd -> ux_slave_dcd_controller_hardware;

    /* Fetch the address of the physical endpoint.  */
    ed =  &dcd_stm32 -> ux_dcd_stm32_ed[epnum & 0xF];

    /* Get the pointer to the transfer request.  */
    transfer_request =  &(ed -> ux_dcd_stm32_ed_endpoint -> ux_slave_endpoint_transfer_request);

    /* Endpoint 0 is different.  */
    if (epnum == 0U)
    {

        /* Get the pointer to the logical endpoint from the transfer request.  */
        endpoint =  transfer_request -> ux_slave_transfer_request_endpoint;

        /* Check if we need to send data again on control endpoint. */
        if (ed -> ux_dcd_stm32_ed_state == UX_DCD_STM32_ED_STATE_DATA_TX)
        {

            /* Arm Status transfer.  */
            HAL_PCD_EP_Receive(hpcd, 0, 0, 0);

            /* Are we done with this transfer ? */
            if (transfer_request -> ux_slave_transfer_request_in_transfer_length <= endpoint -> ux_slave_endpoint_descriptor.wMaxPacketSize)
            {

                /* There is no data to send but we may need to send a Zero Length Packet.  */
                if (transfer_request -> ux_slave_transfer_request_force_zlp ==  UX_TRUE)
                {

                    /* Arm a ZLP packet on IN.  */
                    HAL_PCD_EP_Transmit(hpcd, 
                            endpoint->ux_slave_endpoint_descriptor.bEndpointAddress, 0, 0);

                    /* Reset the ZLP condition.  */
                    transfer_request -> ux_slave_transfer_request_force_zlp =  UX_FALSE;

                }
                else
                {

                    /* Set the completion code to no error.  */
                    transfer_request -> ux_slave_transfer_request_completion_code =  UX_SUCCESS;

                    /* The transfer is completed.  */
                    transfer_request -> ux_slave_transfer_request_status =  UX_TRANSFER_STATUS_COMPLETED;

                    /* We are using a Control endpoint, if there is a callback, invoke it. We are still under ISR.  */
                    if (transfer_request -> ux_slave_transfer_request_completion_function)  
                        transfer_request -> ux_slave_transfer_request_completion_function (transfer_request) ;

                    /* State is now STATUS RX.  */
                    ed -> ux_dcd_stm32_ed_state = UX_DCD_STM32_ED_STATE_STATUS_RX;
                }
            }
            else
            {

                /* Get the size of the transfer.  */
                transfer_length = transfer_request -> ux_slave_transfer_request_in_transfer_length - endpoint -> ux_slave_endpoint_descriptor.wMaxPacketSize;

                /* Check if the endpoint size is bigger that data requested. */
                if (transfer_length > endpoint -> ux_slave_endpoint_descriptor.wMaxPacketSize)
                {

                    /* Adjust the transfer size.  */
                    transfer_length =  endpoint -> ux_slave_endpoint_descriptor.wMaxPacketSize;
                }

                /* Adjust the data pointer.  */
                transfer_request -> ux_slave_transfer_request_current_data_pointer += endpoint -> ux_slave_endpoint_descriptor.wMaxPacketSize;

                /* Adjust the transfer length remaining.  */
                transfer_request -> ux_slave_transfer_request_in_transfer_length -= transfer_length;

                /* Transmit data.  */
                HAL_PCD_EP_Transmit(hpcd, 
                            endpoint->ux_slave_endpoint_descriptor.bEndpointAddress, 
                            transfer_request->ux_slave_transfer_request_current_data_pointer,
                            transfer_length);
            }
        }
    }
    else
    {
	    if (transfer_request -> ux_slave_transfer_request_force_zlp ==  UX_TRUE)
	    {
            /* Get the pointer to the logical endpoint from the transfer request.  */
            endpoint =  transfer_request -> ux_slave_transfer_request_endpoint;

		    /* Arm a ZLP packet on IN.  */
		    HAL_PCD_EP_Transmit(hpcd,
				    endpoint->ux_slave_endpoint_descriptor.bEndpointAddress, 0, 0);

		    /* Reset the ZLP condition.  */
		    transfer_request -> ux_slave_transfer_request_force_zlp =  UX_FALSE;

	    }else{
		    /* Set the completion code to no error.  */
		    transfer_request -> ux_slave_transfer_request_completion_code =  UX_SUCCESS;

		    /* The transfer is completed.  */
		    transfer_request -> ux_slave_transfer_request_status =  UX_TRANSFER_STATUS_COMPLETED;

		    /* Non control endpoint operation, use semaphore.  */
		    _ux_utility_semaphore_put(&transfer_request -> ux_slave_transfer_request_semaphore);
	    }
    }
}

Describe the set-up

• The board: STM32H735G-DK
• IDE: IAR 9.10.2
• Project: Fx_NoR_Write_Read_File example

Describe the bug (skip if none)

I start the example out of the box, generated with CubeMX for STM32H735G-DK. The fx_media_format at line 147 in app_filex.c returns a FX_IO_ERROR, which ends the program.

How to reproduce the bug (skip if none)

Start the app and run it step by step up to the fx_media_format call in app_filex, you'll see the return value that is not FX_SUCCESS as it should.

Describe the set-up

I'm using a H7B3 on a custom board. On this board I want to use USB with Azure USBx.
The USB configuration in CubeMX is:

USB host only
DMA enabled
internal PHY
Speed: FullSpeed

The USB devices I want to connect to my board are:

• Prolific-Device
• MassStorage-Device

I'm using CubeIDE 1.10.1 and X-CUBE-AZRTOS-H7 v2.1.0

Describe the bug (skip if none)
If I connect a prolific device for the first time, it gets detected correctly.
When I disconnect it and reconnect it after a few seconds, sometimes a communication is not possible any more, even it seems that it was detected.

How to reproduce the bug (skip if none)

1. Connect a prolific device to USB interface
2. Communicate -> working
3. Disconnect the prolific device
4. Wait some seconds
5. Connect the prolific device again
6. Communicate -> sometime not working

Additional context
I currently fixed it by reinitialize the HCD after a disconnection was detected. I placed the reinit into the USBx-EventCallback in the event UX_DEVICE_DISCONNECTION.

    HAL_HCD_Stop(&_handle);
    HAL_HCD_Init(&_handle);
    HAL_HCD_Start(&_handle);

Screenshots

If applicable, add screenshots to help explain your problem.

I have successfully ported ThreadX and USBX on my own board and successfully run the USB CDC+HID example
But when I tried to understand the USB workflow, I ran into a problem. I can only roughly understand the need to prepare device descriptors, report descriptors, etc. But I don’t know the USB FIFO endpoints and the link between reading and writing. The related code is very complicated. Whether to provide A note to explain this?

Hello, I'm using usbx ux_device_class_hid_event_set(hid_inst, &hid_event); to transmit data from my stm32h7 board to host. My hid_inst has two endpoints, one for receiving data and one for sending data:

When I sends data using endpoint 0x82, this thread stucks at

It seems no data is sent at all. I sniffed the usb, no data is received at host at endpoint 0x82.

In filex nor flash driver, current_driver->initialized is set to FX_TRUE after FX_DRIVER_INIT, but this state is not set to FX_FALSE in FX_DRIVER_UNINIT, here is the code:

https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/437ec3bb3455a26c535de52f0fc7f553c739acb7/Middlewares/ST/filex/common/drivers/fx_stm32_levelx_nor_driver.c#L135C1-L139C1

Is it a bug or by design?

Hello, I'm currently working on porting filex + levelx to my NAND flash. While referencing the STM32H743I-EVAL example in the x-cube-azrtos-h7 repository (https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Projects/STM32H743I-EVAL/Applications/FileX/Fx_Nand_Write_Read_File/), I observed that in the NAND flash driver (lx_stm32_nand_custom_driver.c) when calling the lx_nand_flash_driver_pages_write function, the parameter used is SPARE_BYTES_PER_PAGE (https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Projects/STM32H743I-EVAL/Applications/FileX/Fx_Nand_Write_Read_File/LevelX/Target/lx_stm32_nand_custom_driver.c#L430).

In the same file (lx_stm32_nand_custom_driver.c), at line 359, an offset is applied to the write position. I'm concerned that this offset might lead to accessing addresses beyond the allocated space during the copy operation at line 365 (https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Projects/STM32H743I-EVAL/Applications/FileX/Fx_Nand_Write_Read_File/LevelX/Target/lx_stm32_nand_custom_driver.c#L365).

I'm curious if there's a specific reason for this offset, or if there are any internal arrangements within levelx that I may not be aware of.

README.md has info on the supported toolchains.
The name RealView Microcontrollor Development Kit is an old one.
I suggest to replace it with the up-to-date name "Keil MDK"

1. I first refer to the x-cube-azrtos-h7 example on STM32 H7 to migrate ThreadX and USBX. CDC HID, including the combination of the two, have been tested, and they all work normally.
2. Then I ported ThreadX and USBX on STM32 F105RBT6. Currently, they can enumerate and work normally, but there are still some problems. The specific problems are as follows:
   On F105RBT6, USBX has problems with the data processing (OUT) sent by the host. The specific manifestation is HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x200) when the USB is initialized; the RX FIFO is 512 bytes. When the host sends more than 512 data to the STM32 through VCOM After the byte, VCOM will stop working. The same situation also occurs on HID devices. When the data received by app_usbx_device_thread_hid_callback() exceeds 512 bytes, it will also stop working. The same code will not have problems on H7.
   My guess is that USBX did not correctly read data from the RX FIFO on the STM32 F105, which caused the RX FIFO to overflow and freeze, but I don’t know how to fix it. Can you provide some information?

Hello,
I have successfully ported ThreadX and FileX on my own board STM32H735G DK and successfully run the Fx_uSD_File_Edit example.
But when I enable the FX_ENABLE_EXFAT macro and use the exfat format SD card, the program makes an error when opening the SD device and returns FX_IO_ERROR. When I disable DCache, the program runs normally.
So I checked the code and found that there seems to be some problems in the processing of DCache,
in x-cube-azrtos-h7/Middlewares/ST/filex/common/drivers/fx_stm32_sd_driver.c line 122,
unaligned_buffer = (UINT)(media_ptr-> fx_media_driver_buffer) & 0x3;
This is used to determine whether the four bytes are aligned, and if so, use DMA transmission directly. In line 300 and line 336, SCB_InvalidateDCache_by_Addr() is used to maintain data consistency, but SCB_InvalidateDCache_by_Addr() requires 32-byte data alignment.
I changed the code to
unaligned_buffer = (UINT)(media_ptr->fx_media_driver_buffer) & 0x1f;
The program seems to be able to use exfat and Dcache at the same time.
I want to know if I am doing this right? And why there is no problem when using the FAT32 file system.

Thank you .

Describe the set-up

• x-cube-azrtos-h7/Projects/STM32H735G-DK/Applications/USBX/Ux_Host_MSC/
• USB Mass storage with 2GB capacity is tested.

Problem -- Stack gets corrupted if msc_process_thread_entry() is exited

1. In file ux_host_msc.c, we are waiting for the message by calling the following function "tx_queue_receive(&ux_app_MsgQueue_msc, &fx_media, TX_WAIT_FOREVER);". Then, the code waits there forever. Note that fx_media is the destination address, where the data from queue has to be copied.
2. Once USB is inserted, the execution control goes to the function "tx_queue_send(&ux_app_MsgQueue_msc, media, TX_NO_WAIT); in the 'app_usbx_host.c' file".
3. Single stepping leads us to the function "_tx_queue_send()" in the tx_queue_send.c file. And inside this function, the execution comes to the following MACRO "TX_QUEUE_MESSAGE_COPY(source, destination, size)". This is where we believe the problem occurs.
4. In MACRO "TX_QUEUE_MESSAGE_COPY()", the destination pointer is fx_media. It seems that TX_QUEUE_MESSAGE_COPY() is copying an extra word and that is leading to stack corruption.
5. If you look closely in file 'ux_host_msc.c' and with in the thread "msc_process_thread_entry()", fx_media is allocated in the stack next to the place, where return address of the thread "msc_process_thread_entry" is stored.
6. Once the TX_QUEUE_MESSAGE_COPY() writes an extra word, it corrupts the stack and therefore, the return address of thread "msc_process_thread_entry()" is lost forever.
7. If we want to exit the thread "msc_process_thread_entry()", then some random address is returned from the stack. This random address is popped back into the memory and it results in an invalid instruction execution. An invalid instruction execution is considered as a Hard Fault in STM32H7 chip.

This Problem is present in most of the STM32H7 example projects

1. It is to do with the usage of tx_queue_creat() function, specifically the size of message.
2. The message size should be mentioned in multiple of WORDS. If the message size is 4, then the queue has to transfer 4 WORDS.
3. In the example project, a pointer is passed as a message queue. The size of pointer is 4 bytes but it is 1 WORD in terms of message size.
4. STM32H7 sets the message size as 4 instead of 1. This is the root cause of the problem

Problem Is Solved
Check the link eclipse-threadx/threadx#137

Please correct the example projects and leave your response here. Then, I will close the issue in this Repo as well as in Azure RTOS Repo.

Best Regards,
Ajit Basarur
@gdf8gdn8, @goldscott, @ajitbasarur, and @xiaocq2001

While working on a project, i have ran into the following error when building the STMicroelectronics package via STCubeMX.

Error[Pe120]: return value type ("void *") does not match the function type ("UX_DCD_STM32_ED_STRUCT *") ..\Middlewares\ST\usbx\common\usbx_stm32_device_controllers\ux_dcd_stm32.h, Line 142

The Fix for which is for me to cast the following: return(struct UX_DCD_STM32_ED_STRUCT *)(UX_NULL);

I try to use Ux Host HID Standalone project on NUCLEO-H723ZG added code for to register hub class. Hub is enumerated, but no one device put to a hub (mouse or keyboard) not enumerated.

您好！我想启用USB的DMA功能，我看到USBX中使用_ux_utility_memory_allocate来保证内存对齐，如果我需要启用cache，是不是只需要在HAL_HCD_HC_SubmitRequest前后调用SCB_CleanDCache_by_Addr或者SCB_InvalidateDCache_by_Addr函数即可？如下面截图这样的修改。

This is an enhancement request.
Nx_TCP_Echo_Client example is available for NUCLEO-H723ZG.

Is it possible to add this example for STM32H735G-DK too?

Thanks

Hardware: Nucleo-H753ZI
Development Environment: Windows based STM32CubeIDE 1.8.0

This library appears to not include Azure IoT addon. It seems like a strange omission. Is this in the roadmap?
https://github.com/azure-rtos/netxduo/tree/master/addons/azure_iot

Hello,
I am porting the examples to a different H7 microcontroller; I have found and solved a couple of Data Cache related issues, causing corrupted data transfers in the H735 WebServer example.

Microcontroller used: STM32H743ZI on custom board

TWO Toolchains used with same behavior
Toolchain: KEIL MDK-ARM v.5.33 - Arm Compiler v.6.15
Toolchain: STM32CubeIDE v.1.5.1

Effect: On my board, I have an SD-Card containing the provided example files for web server; the PC browser receives corrupted images and corrupted text. The behavior is erratic.

My analysis led to the following results:
The Data Cache is not correctly handled; some memory buffers are NOT 32 bytes aligned and this leads to memory corruption.

Proposed modifications:

1. The file nx_user.h should be modified to the proper packet alignement constant
   line 182
   #define NX_PACKET_ALIGNMENT (32)

2. The SD-Card driver file fx_stm32_sd_driver.c should be modified to ensure proper scratch buffer use when needed
   line 122
   if ((ULONG)(media_ptr->fx_media_driver_buffer) & 0x1F)
   line 149
   if ((ULONG)(media_ptr->fx_media_driver_buffer) & 0x1F)

3. The SD-Card driver file fx_stm32_sd_driver.c should be modified to remove the un-needed memset function call (that causes other collateral effects on Data Cache)
   line 325 - REMOVE
   memset(scratch, '\0', DEFAULT_SECTOR_SIZE);

The mentioned modifications solved the issue on my board.
Thank you for your kind attention, best regards
Bruno

Has anyone got this working?

The code for me is hanging out in tx_semaphore_get waiting forever.

References:
https://community.st.com/s/article/FAQ-Ethernet-not-working-on-STM32H7x3

Examples Followed:
STM32CubeH7 Projects\STM32H743ZI-Nucleo\Applications\LwIP\LwIP_HTTP_Server_Netconn_RTOS
x-cube-azrtos-h7
https://github.com/STMicroelectronics/x-cube-azrtos-h7/tree/main/Projects/STM32H747I-DISCO/Applications
https://github.com/STMicroelectronics/x-cube-azrtos-h7/tree/main/Projects/NUCLEO-H723ZG/Applications/NetXDuo

Hardware:
-Nucleo-H753ZI Nucleo Board
-SB26 removed to allow for SWO and confirmed working

Development Environment:
-STM32CubeIDE

STM32CubeMXConfiguration:

-Ethernet global interrupt enabled

-ThreadX configuration the default
-NetXDuo configuration the default except NX_ENABLE_INTERFACE_CAPABILITY enabled
-Cache & MPU Disabled

Software:
-Linker code added after HEAP
` .tcp_sec (NOLOAD) :
{
_stcps = .; /* define a global symbol at start */
. = ABSOLUTE(0x30000000);
*(.RxDecripSection)
. = ABSOLUTE(0x30000060);
(.TxDecripSection)
_etcps = .; / define a global symbol at end */
} >RAM_D2 AT >FLASH

.nx_data 0x30000100 (NOLOAD) :
{
_snxd = .; /* define a global symbol at start */
*(.NetXPoolSection)
(.ThreadXPoolSection)
_enxd = .; / define a global symbol at end */
} >RAM_D2 AT >FLASH`
-Memory pool allocations all succeed
-app_azure_rtos.c, app_threadx.c, app_netxduo.c, are the same as the example
-I found I had to put tx_byte_pool_buffer into D2 RAM or i got hardfaults, not sure why =(.

Describe the set-up

• Download X-CUBE-AZRTOS-H7 from ST Website
• Download this Repo

Describe the bug

• compare these code

-->the contents of package downloaded from ST is different from this Repo

Screenshots

please see attachment.

Environment:
STM32CubeIDE 1.8.0
STM32CubeMX 6.4.0
x-cube-azrtos-h7 2.0.0

I only initialized the RCC clock and an LED IO port，then i choose threadx core in software pack of x-cube-azrtos-h7.
After I added an LED flashing thread, but it didn't run

Environment: Windows based CubeIDE/CubeMX and a Nucleo-H753ZI

Is someone able to post a working 'hello world' web page example using the HTTPS server? One that works with Chrome and Firefox?

Right now in Firefox I get SSL_ERROR_NO_CYPHER_OVERLAP Chrome I get:

I have tried several combinations of cipher suites with no luck. Most of the config is from this example:
https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Middlewares/ST/netxduo/samples/demo_netxduo_https.c

Similar to this the page does work in IE11 but enabling AEAD via CubeMX which defines NX_SECURE_ENABLE_AEAD_CIPHER doesn't seem help in Chrome and Firefox.
https://community.st.com/s/question/0D53W00000nZEvLSAW/http-to-https-web-server-on-stm32h735gdk-based-on-examples

CubeMX Crypto Core Settings:

CubeMX TLS Core settings:

Other references:
https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-secure-tls/chapter2
https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-web-http/chapter2
https://github.com/STMicroelectronics/x-cube-azrtos-h7/tree/main/Projects/STM32H735G-DK/Applications/NetXDuo/Nx_WebServer

I now have nearly have working the basis of a functional system:

• HTTP server
• redirect from the base of the web server to /index.html
• serving multiple files html/css/js
• serving large pages
• injecting an uptime server side variable into the page
• AJAX to dynamically update the uptime
• posting a new uptime back from the browser
• basic authentication

Hello,

I am trying to install FileX + LevelX in an stm32h7 microcontroller using a nor custom driver. I do have in my hardware an AT45DB641 NOR memory.

I am working it as an stand alone and also with fault tolerant enable.

My flash chip does have 4096 blocks of 2048 bytes each. i can write and read on pages of 256 bytes each.

Right now i am being able to format and open the media after doing a full reset of my chip, as i understand, putting everything to 1 (0xFF).

I can run the example that stm32 provide about creating a file etc...

My issue happens the second time i do run the code, but this time without erasing the chip.

I am getting following error from levelx: LX_SYSTEM_INVALID_BLOCK

and from filex: FX_IO_ERROR.

My code is as follows:

nor_custom_driver

#ifndef LX_DIRECT_READ

#ifndef NOR_SECTOR_BUFFER_SIZE
#define NOR_SECTOR_BUFFER_SIZE 512
#endif

static ULONG nor_sector_memory[NOR_SECTOR_BUFFER_SIZE];
#endif

UINT lx_stm32_nor_custom_driver_initialize(LX_NOR_FLASH *nor_flash)
{
UINT ret = LX_SUCCESS;

ULONG total_blocks = 0;
ULONG words_per_block = 0;

/* USER CODE BEGIN Init_Section_0 */
total_blocks = _45DBXX_ACTUALBLOCKS;
words_per_block = _45DBXX_BLOCKBYTES / sizeof(ULONG);

nor_flash->lx_nor_flash_base_address = _45DBXX_STARTADD;

/* USER CODE END Init_Section_0 */

nor_flash->lx_nor_flash_total_blocks = total_blocks;
nor_flash->lx_nor_flash_words_per_block = words_per_block;

/* USER CODE BEGIN Init_Section_1 */

/* USER CODE END Init_Section_1 */

nor_flash->lx_nor_flash_driver_read = lx_nor_driver_read;
nor_flash->lx_nor_flash_driver_write = lx_nor_driver_write;

nor_flash->lx_nor_flash_driver_block_erase = lx_nor_driver_block_erase;
nor_flash->lx_nor_flash_driver_block_erased_verify = lx_nor_driver_block_erased_verify;

#ifndef LX_DIRECT_READ
nor_flash->lx_nor_flash_sector_buffer = nor_sector_memory;
#endif

/* USER CODE BEGIN Init_Section_2 */

/* USER CODE END Init_Section_2 */

return ret;

}

static UINT lx_nor_driver_write(ULONG *flash_address, ULONG *source, ULONG words)
{
UINT ret = LX_SUCCESS;

/* USER CODE BEGIN NOR_DRIVER_WRITE */

uint16_t size = words * sizeof(ULONG);			//	TRANSFORMAMOS LAS WORDS A BYTES
uint8_t writeBuffer[_45DBXX_BLOCKBYTES];
for (int i = 0; i < size; ++i)
{
	writeBuffer[i] = ((uint8_t *)source)[i];
}
uint16_t arrayElement = 0 ;
ULONG *localFlashAddress = flash_address;

while (size > 0)
{
    uint32_t chunk_size = (size > _45DBXX_PAGEBYTES) ? _45DBXX_PAGEBYTES : size; // Determine the size of the next chunk
    AT45dbxx_WritePage2(&writeBuffer[arrayElement], (uint16_t)chunk_size, (uint32_t)localFlashAddress);

    // Update the buffer and address for the next chunk
    arrayElement += (chunk_size);
    localFlashAddress += chunk_size ;
    size -= chunk_size;
}

/* USER CODE END  NOR_DRIVER_WRITE */

return ret;

}

static UINT lx_nor_driver_block_erase(ULONG block, ULONG erase_count)
{

UINT ret = LX_SUCCESS;

/* USER CODE BEGIN NOR_DRIVER_BLOCK  */

uint32_t at45Block = (block * _45DBXX_BLOCKBYTES) + _45DBXX_STARTADD ;
AT45dbxx_EraseBlock(at45Block);


/* USER CODE END  NOR_DRIVER_BLOCK  */

return ret;

}

static UINT lx_nor_driver_block_erased_verify(ULONG block)
{
UINT ret = LX_SUCCESS;

/* USER CODE BEGIN NOR_DRIVER_VERIFY  */

// Buffer to store the read data
uint8_t readBuffer[_45DBXX_PAGEBYTES];

// Calculate the starting address in bytes
ULONG start_address = block * _45DBXX_BLOCKBYTES + _45DBXX_STARTADD;

// Read and verify the block in chunks
for (ULONG offset = 0; offset < _45DBXX_BLOCKBYTES; offset += _45DBXX_PAGEBYTES)
{
    // Calculate the current address within the block
    ULONG current_address = start_address + offset;

    // Read a chunk of data
    AT45dbxx_ReadPage2(readBuffer, _45DBXX_PAGEBYTES, current_address);

    // Verify that all bytes in the chunk are 0xFF
    for (ULONG i = 0; i < _45DBXX_PAGEBYTES; ++i)
    {
        if (readBuffer[i] != 0xFF)
        {
            ret = LX_ERROR; // Block is not fully erased
            break;
        }
    }

    // Break out of the loop if an error is detected
    if (ret != LX_SUCCESS)
    {
        break;
    }
}

/* USER CODE END  NOR_DRIVER_VERIFY  */

return ret;

}

UCHAR media_memory[512];
UCHAR media_buffer[512];
ULONG detected_errors;
UCHAR sratch_memory[4096];

/* Define FileX global data structures. */
FX_MEDIA nor_flash_disk;
FX_FILE fx_file;

ULONG fault_tolerant_memory[3072 / sizeof(ULONG)];

and my filex code is:

UINT MX_FileX_Init(VOID)
{
UINT ret = FX_SUCCESS;
/* USER CODE BEGIN MX_FileX_Init */

/* USER CODE END MX_FileX_Init */

/* Initialize FileX. */
fx_system_initialize();

/* USER CODE BEGIN MX_FileX_Init 1*/

/* USER CODE END MX_FileX_Init 1*/

return ret;
}

void MX_FileX_Process()
{
/* USER CODE BEGIN fx_app_thread_entry 0 */

UINT status;
ULONG available_space_pre;
ULONG available_space_post;
ULONG bytes_read;
CHAR read_buffer[32];
CHAR data[] = "This is FileX working on STM32";

uint8_t err = 0 ;

err = 0x80;

 do{
	err = AT45dbxxx_Dataflash_ReadStatus(&_45DBXX_SPI);
 }while(err == 0x80);	

  AT45dbxx_EraseChip();

status =  fx_media_format(&nor_flash_disk,
						fx_stm32_levelx_nor_driver,   // Driver entry
						(VOID*)CUSTOM_DRIVER_ID, // Device info pointer
						(UCHAR*)media_memory,                 // Media buffer pointer
						sizeof(media_memory),         // Media buffer size
						"NOR_FLASH_DISK",             // Volume Name
						1,                            // Number of FATs
						32,                           // Directory Entries
						0,                            // Hidden sectors
						_45DBXX_ACTUALBLOCKS,      		  // Total sectors
						512,           // Sector size
						1,                            // Sectors per cluster
						1,                            // Heads
						1);                           // Sectors per track

 status =  fx_media_open(&nor_flash_disk, "FX_LX_NOR_DISK", fx_stm32_levelx_nor_driver,(VOID*)CUSTOM_DRIVER_ID , media_buffer, sizeof(media_buffer));

 status = fx_media_check(&nor_flash_disk, sratch_memory, 4096,
		FX_FAT_CHAIN_ERROR |
		FX_DIRECTORY_ERROR |
		FX_LOST_CLUSTER_ERROR, &detected_errors);

  status = fx_fault_tolerant_enable(&nor_flash_disk, fault_tolerant_memory, sizeof(fault_tolerant_memory));

  if (status != FX_SUCCESS)
  {
    Error_Handler();
  }

  status =  fx_media_space_available(&nor_flash_disk, &available_space_pre);

  /* Check the get available state request status.  */
  if (status != FX_SUCCESS)
  {
    Error_Handler();
  }

  status =  fx_file_create(&nor_flash_disk, "STM32.TXT");

  /* Check the create status.  */
  if (status != FX_SUCCESS)
  {
    /* Check for an already created status. This is expected on the
    second pass of this loop!  */
    if (status != FX_ALREADY_CREATED)
    {
      /* Create error, call error handler.  */
      Error_Handler();
    }
  }
  status =  fx_file_open(&nor_flash_disk, &fx_file, "STM32.TXT", FX_OPEN_FOR_WRITE);

  status =  fx_file_seek(&fx_file, 0);

  status =  fx_file_write(&fx_file, data, sizeof(data));

  status =  fx_file_close(&fx_file);

  status = fx_media_flush(&nor_flash_disk);

  status =  fx_file_open(&nor_flash_disk, &fx_file, "STM32.TXT", FX_OPEN_FOR_READ);

  status =  fx_file_seek(&fx_file, 0);

  status =  fx_file_read(&fx_file, read_buffer, sizeof(data), &bytes_read);

  status =  fx_file_close(&fx_file);

  status =  fx_media_space_available(&nor_flash_disk, &available_space_post);

  status =  fx_media_close(&nor_flash_disk);

  if (status != FX_SUCCESS)
  {
    /* Error closing the media, call error handler.  */
    Error_Handler();
  }

  while(1)
  {

// BSP_LED_Toggle(LED_GREEN);
// tx_thread_sleep(40);
}

}

I really dont understand what is happening, i am even doing a direct read with my memory functions and i am seeing that the text and file name is present in the memory... is this something someone can help me with?

A bug is present when using STM32CubeIDE to generate code that uses USBX with the CDC-ECM device class.
The ux_device_descriptors.c file contains following code:

#if USBD_CDC_ECM_CLASS_ACTIVATED == 1

  /* Set MAC_STRING_INDEX and MAC_STRING in string_framework */
  count += len + 1;
  USBD_string_framework[count++] = USBD_LANGID_STRING & 0xFF;
  USBD_string_framework[count++] = USBD_LANGID_STRING >> 8;
  USBD_string_framework[count++] = CDC_ECM_MAC_STRING_INDEX;

  /* Set the Mac address in USBD_string_framework */
  USBD_Desc_GetString((uint8_t *)CDC_ECM_LOCAL_MAC_STR_DESC, USBD_string_framework + count, &len);

#endif /* USBD_CDC_ECM_CLASS_ACTIVATED */

However, CDC_ECM_LOCAL_MAC_STR_DESC is wrong here, it should be CDC_ECM_REMOTE_MAC_STR_DESC.
See also here:

The remote node must be the same one as the one declared in the device framework string descriptor.

I have successfully run the ThreadX+USBX program on the H7 chip. The USB composite device (CDC ACM+HID) is used, so I tried to implement the same function on F105RBT6, but I ran into trouble, running USB on F105 The composite device can run normally at the beginning, but after 30s, the USB will be disconnected and reconnected, and the USB will not be recognized. I learned that H7 has 9 endpoints and F1 has only 4 USB endpoints. Will it? Is USB working abnormally because of the number of endpoints?

Hello,

I have some experience with FreeRTOS, and the integration with the newLib heap and the heap mechanism for FreeRTOS was not fully integrated (see http://www.nadler.com/embedded/newlibAndFreeRTOS.html).

In the current ThreadX example I understand that the RAM map looks like that

The newLib heap can expand to _estack (ORIGIN(RAM) + LENGTH(RAM)) - _Min_Stack_Size according to the current "_sbrk" implementation that would mean that if you use malloc/new() at any point in your system, you could potentially be overwriting the ThreadX memory pool.

The NewLib heap and the ThreadX allocation are working completely unaware one of an other. If it is up to the user to be aware of that, that should be documented, it can cause quite a lot of problems. Otherwise, are you planing to offer a better integration?

Looking forward to reading your thoughts.

Thanks.

Hi there,

i am trying to get into Microsoft Azure RTOS IoT Development and i loaded via STM32CubeIDE the NX_TCP_Echo_Client Example for Nucleo-H723ZG which is for my understanding pin compatible.

I can build the project and deploy it to the target.

But i dont see any DHCP packets in Wireshark.

When i run the LwIP_HTTP_SERVER_Netconn_RTOS Example everything is working fine. So my managed switch / wireshark setup is ok.

Can you give me a hint?

Toolchain: MDK-ARM Version:5.34.00
Mcu: STM32H743XIHb
Question:
1.I refer x-cube-azrtos-h7-main->STM32H747I-DISCO->App->USBX->Ux_Device_HID_CDC_ACM for porting USBX and ThreadX
2.ThreadX Working fine
3.MX_USB_Device_Init() Initialization successful
4.No new devices appear in Windows Device Manager
5.Use MDK for Debug MX_USB_Device_Init() can be executed completely, but no USB appears. How can I solve it?

SD MSC has been successfully run on USBX and can read and write normally. Can Nor FLASH also achieve the same function?

The project in which the issue applies to:
https://github.com/STMicroelectronics/x-cube-azrtos-h7/tree/main/Projects/STM32H735G-DK/Applications/NetXDuo/Nx_MQTT_Client

Issue 1:
Last will message does not get triggered with the MQTT Client Project altough I added the last will registering function before connecting to the broker.

Issue 2:
After a certain time subscribed topics are having a delay of about 8 seconds after I published something somwhere else.

Solution to both issues:
According the Microsoft NetxDuo documentation the keepalive argument for the nxd_mqtt_client_connect function must be in seconds.
https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-mqtt/chapter3#nxd_mqtt_client_connect

But in the application example the keep alive define is most probably in ticks. Assuming that 1 tick is 10 ms, the 30000 resulting in 300000 ms which are 300 secconds thus 5 minutes.

I changed the define value to 60 and the last will message gets triggered after 60 seconds and such 8 seconds delay on subscribed topics didn't happen again.

Describe the set-up

• The board (either ST RPN reference or your custom board)

STM32H735G-DK

• IDE or at least the compiler and its version

STM32CubeIDE version 1.5.1

Describe the bug

If I uncomment #define TX_THREAD_ENABLE_PERFORMANCE_INFO in tx_user.h, the Tx_Thread_Sync application freezes - the LEDs stop blinking.
If I comment it out again, the app works fine.

Hardware Set Up

• Nucleo STM32H743 MCU
• Latest HAL FW version

Bug

• STM32 provides HAL library for the configuration of timers. In this bug, I am using TIM5 of STM32H743. However, this bug is applicable to other timers as well.
• In order to start or stop a timer, there are separate set of functions available with HAL timer library. For example HAL_TIM_Base_Start***() and HAL_TIM_Base_Stop***() functions.
• To start or stop an individual channel of a timer, there are also dedicated functions such as HAL_TIM_OC_Start***() and HAL_TIM_OC_Stop***()
• What is the bug???
  • OC_Start() and OC_Stop() functions also enable and disable the timer within their implementations.
  • This will not allow us to operate the channels independent of timer counter. There are some application scenarios, where we would like to enable and disable only the channels without stopping the counter.

How to reproduce the bug (skip if none)

1. HAL_TIM_Base_Start() --> HAL_TIM_OC_Stop() OR
2. HAL_TIM_OC_Stop() --> HAL_TIM_OC_Start()

Additional context

I do not understand, why the OC enable and disable function should hamper the operation of timer counter!!! This hinders the operation of channels independent of counter.

I cannot add the Azure IOT-Hub connection to the code, cause it is not defined in CMakelist in Netxduo.

https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Middlewares/ST/netxduo/addons/CMakeLists.txt

NXD_ENABLE_AZURE_IOT @ line#50.

Is there any way to define it while generating code? There must be a check on "select component" window.

Describe the set-up

• stm32h743iit6
• stm32cubeide 1.11.2

Is there an example of a USB host connected to a USB camera? I want to drive a USB camera through STM32H743IIT6

I learned a lot of knowledge about ThreadX, USBX and so on through https://github.com/STMicroelectronics/x-cube-azrtos-h7/, but when I tried to study FileX further, the problem appeared because there was no CubeMX configuration file in the sample project. Can’t successfully configure the SD card and generate basic code for FileX to use. Can the official CubeMX configuration file be provided?

Hardware: Nucleo-H753ZI
Development Environment: Windows based STM32CubeIDE 1.8.0

This library appears to not include the SNMP addon. Is this in the roadmap?
https://github.com/azure-rtos/netxduo/tree/master/addons/snmp

Hardware:
-NUCLEO-H753ZI
Dev Environment:
-Windows 10, latest patches
-STM32CubeIDE Version: 1.11.2 Build: 14494_20230119_0724 (UTC)
-STM32CubeMX - STM32 Device Configuration Tool Version: 6.7.0-RC4 Build: 20230113-0839 (UTC)

Fresh project, minimal configuration. Ethernet and ping working fine. Compiles fine with Web Server component added. After Crypto and TLS components are added along with "NX_WEB_HTTPS_ENABLE" configuration being selected, project stops building with a bunch of multiple definition errors.

Problem:
-build errors in below file
xcubeazrtosh7 https server build errors.txt
ioc file (zipped):
p4.zip