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trabucayre avatar trabucayre commented on May 27, 2024

arty is for 35t version. I have left this entry for backward compatibility (but maybe i'ts an error). For the 100t version you have to use -b arty_a7_100t (it's required to have FPGA mode/size for loading correct bridge).
I suspect something like that (and I have to improve sanity check in direct part of the code to verify FPGA<->bitstream match and stop when jedec == 0xffffff or 0x000000).

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inkdot7 avatar inkdot7 commented on May 27, 2024

That was quick! Thanks! That did the trick!

Indeed it would be nice with all that sanity checking.
Also for the bitstream one tries to load into flash - I am making so many mistakes...

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trabucayre avatar trabucayre commented on May 27, 2024

It's planned to try to have a more global/simple way for sanity check between hardware and bitfile.
Thanks!

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