Computer skills in JAVA, JavaScript, NodeJS, Python etc. Appreciable knowledge of DevOps tools (Docker, Git, Kubernetes etc) Experience on developing software, including documentation using UML
Topics include the design of data acquisition systems (NI-based), assisting in experimental work, and modeling tasks (electric and hydraulic systems). The work is mainly composed of development activities, algorithm and software development (Labview), overviews of scientific articles, setting of experimental systems, collecting data and performing experiments, modeling, and simulation (Matlab, Simulink, Amesim), assisting in demos and other events related to research projects.Programming experience in one of the languages and environments: C, C++, Matlab, Python Familiar with Data acquisition systems (Labview)
JD
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Phân tích, thiết kế và lựa chọn các giải pháp cho hệ thống nhúng
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Viết firmware triển khai và tối ưu thuật toán điều khiển.
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Phát triển sản phẩm đo lường và thu thập dữ liệu không dây, các sản phẩm về GPS, IoT
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Thực hiện các công việc do quản lý giao
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Sử dụng thành thạo ngôn ngữ C/C++
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Có kiến thức cơ bản về kỹ thuật vi xử lý và kỹ thuật điện tử
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Có kinh nghiệm trong Hệ thống nhúng
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Nắm vững kiến thức cơ bản về cấu trúc dữ liệu và giải thuật
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Có kinh nghiệm lập trình các dòng vi điều khiển, vi xử lý: 16/32bit
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Có kiến thức về xây dựng hệ thống thu thập dữ liệu và truyền thông, triển khai công nghệ mới liên quan đến IoT, Home automation
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Có kinh nghiệm lập trình ngoại vi, giao tiếp bộ nhớ, giao tiếp số (UART/SPI/I2C/CAN...)
About Genuinely passionate about Mobile Networks. R&D on leading-edge technologies for 5G/LTE mobile networks. Previous experience as RF Optimization Engineer, test and performance analysis on 3G/LTE Radio Access Networks (RAN). Competencies: RAN, WCDMA, LTE, 5G NR, Signal Processing, VHDL, Linux, TCL.
RF Optimization Engineer Company NameKonectado Dates EmployedJul 2014 – Jun 2017 Employment Duration3 yrs LocationQuito, Ecuador -LTE/WCDMA Radio Network Optimization. -Analysis and review of KPI, HW/SW RF parameters in wireless networks. -Antenna coverage requirements analysis. -Definition, validation, and recommendation for new base stations (CNT/Claro Networks). -DAS design, iBwave DESIGN tool. -RF tools: Atoll, U-Net, GENEX Assistant/Probe, Swissqual NQDI, TEMS, MapInfo, NEMO.
Tampere University of Technology Degree NameMSc. Electrical EngineeringField Of StudyWireless Communications & RF Systems Relevant courses: -Advanced course on Wireless Communications. -Multicarrier and Multiantenna Techniques. -Radio Propagation in Wireless Networks. -RF Equipment for Wireless Networks. -Software Defined Radio Platforms -Digital Design
Moein Reza Golzadeh 3rd degree connection3rd SoC Engineer at Nokia
- SoC Engineer Full-time Dates EmployedNov 2019 – Present Employment Duration2 yrs LocationTampere Area, Finland
- C++/Matlab FXP modeling, L1 Rx baseband (FPGA/ASIC)
- Modeling/verification strategy documentation
- UVM top level verification, L1 Tx/Rx (FPGA)
- Trainee, SoC Dates EmployedApr 2019 – Oct 2019 Employment Duration7 mos LocationTampere Area, Finland
- UVM top level verification, L1 Rx (FPGA)
Tampere University Degree NameMaster of ScienceField Of StudyWireless Communications and RF Systems Grade5/5 Dates attended or expected graduation2018 – 2021
https://www.linkedin.com/learning/building-deep-learning-applications-with-keras-2-0 https://www.linkedin.com/learning/c-plus-plus-advanced-topics
SoC Verification Engineer at Nokia
Nokia Total Duration 4 yrs 6 mos
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SoC Verification Engineer Dates EmployedOct 2017 – Present Employment Duration4 yrs 1 mo LocationTampere Area, Finland A part of a team that works on complex subsystem-level verification for 5G SoCs. Key responsibilities are: 1- UVM testbench development. 2- RTL debugging. Ensuring clean regressions. 3- Giving support for top-level verification. 4- Communication with IP-level and top-level verification teams.
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SoC Trainee Dates EmployedMay 2017 – Sep 2017 Employment Duration5 mos LocationTampere Area, Finland During this internship, I implemented and verified a cryptographic IP using High Level Synthesis (HLS).
We are looking for
Trainee /Thesis worker’s for SoC/IP development Logical and physical implementation experience synthesis, STA, P&R, DFT Good understanding of ASIC design flow from from RTL to GDS Knowledge and experience of digital design, verification and debugging Some experience of scripting languages like TCL, Python, Perl, shell Knowledge of VHDL or SystemVerilog language and Linux system Fluent English, good communication skills and the ability to work in international teams High motivation to learn new. Job
Trainee - Trainee
Primary Location
Europe North-Finland-Finland-Oulu
Schedule
Full-time
We are now looking trainees to join our SoC development teams. We are interested on persons in the middle of the studies, who have understanding and/or studies on any of topic listed below SoC design and verification tools (VHDL, System-Verilog) SoC related SW and scripting languages (C, C++, Python). Machine Learning and Artificial Intelligence (Python, Matlab). Traineeship with Nokia will give you a good experience about working with state-of-the-art technologies and in a true multicultural working environment. Nokia also offers possibilities to do thesis work as part of the traineeship.
SoC Engineer at Nokia
Tampere University Degree NameMaster's degreeField Of StudyInformation TechnologyGrade3.75 Dates attended or expected graduation2016 – 2018
Major: Pervasive Sysems (Focus area: Computer Systems) Minor: Computer Networking
- SoC Trainee Dates Employed Oct 2017 – Mar 2018 Employment Duration6 mos LocationTampere, Western and Central Finland, Finland
7 Courses
- Digital Design
- Digital Electronics
- Digital Logic Circuits
- Logic Synthesis
- Parallel Embedded Computing
- System Design
- VLSI Systems Design
Engineer, SoC at Nokia
Engineer, SoC Full-time Dates EmployedAug 2021 – Present Employment Duration3 mos TitleTrainee, SoC Dates EmployedFeb 2021 – Jul 2021 Employment Duration6 mos
Tampere University Degree NameMaster's degreeField Of StudyElectrical and Electronics Engineering Dates attended or expected graduation2020 – 2022
Embedded systems and factory automation
Engineer, SoC at Nokia
Master of Science in Embedded Systems. Working with design flows and automation. Knowledge in industry tools, standards and scripting.
Engineer, SoC Full-time Dates EmployedAug 2020 – Present Employment Duration1 yr 3 mos LocationTampere, West and Inner Finland, Finland TitleSoC Trainee
Full-time Dates EmployedJan 2020 – Jul 2020 Employment Duration7 mos LocationTampere Area, Finland Trainee Company NameVLSI Solution Dates EmployedMay 2019 – Aug 2019 Employment Duration4 mos FPGA and system design
VLSI Solution http://www.vlsi.fi/en/jobs.html
System on Chip(SoC) Engineer at Nokia
System on Chip(SoC) Engineer Full-time Dates EmployedOct 2019 – Present Employment Duration2 yrs 1 mo LocationTampere, West and Inner Finland, Finland TitleTrainee Full-time Dates EmployedMay 2019 – Oct 2019 Employment Duration6 mos LocationTampere, Western and Central Finland, Finland
7 Projects
- Implementing different projects to work with different parts of ARM (STM 32), and simulating Digital Circuits inside Proteus software and prototyping with STM32 Discovery kit
- Analog Circuit Design in P-spice for Electronics I, II, III courses.
- My Bachelor’s dissertation was about “Intelligent Robotic Arm for Rehabilitation Using Brainwave and Adaptive Controller (BCI)”
- Pattern Recognition in Matlab for Image Processing course.
- Preparing and designing an LED panel, At the request of the Entrepreneurship Unit at Shariati University.
- Simulating a Channel for Transporting Signals in Matlab for Telecommunication course
- simulating PID controller for various systems in Matlab for Linear Control System course
https://www.linkedin.com/learning/linux-shells-and-processes https://www.linkedin.com/learning/learning-linux-shell-scripting-2018
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SoC Engineer at Nokia
Nokia Total Duration2 yrs 6 mos TitleSoC Engineer Full-time Dates EmployedDec 2019 – Present 1 yr 11 mos LocationTampere Area, Finland TitleSoC Engineering Trainee Dates EmployedMay 2019 – Dec 2019 8 mos
Tampere University of Technology Degree NameMaster's degreeField Of StudyWireless Communications and RF Systems, GPA: 5/5 Dates attended or expected graduation2018 – 2021
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SoC engineer Company NameNokia Full-time Dates EmployedNov 2017 – Present Employment Duration4 yrs LocationTampere Area, Finland
- Maintenance of UVM verification environment
- Writing different tests in UVM to verify 5G NR chipset functionality
- Scripting, including in Bash, Python, Perl, etc., to help improve the level of automation in verification process
Company NameTampere University of Technology Total Duration1 yr 4 mos TitleTeaching Assistant Dates EmployedSep 2016 – Aug 2017 Employment Duration1 yr LocationTampere Area, Finland
- Implementation of a digital signal processing system using VHDL
- Helping students in project work TitleMaster's thesis worker Dates EmployedMay 2016 – Aug 2017 Employment Duration1 yr 4 mos LocationTampere
- Application of Light-Weight Dataflow Envrionment (LIDE) in a deep-learning project
- Design and verification an image processing system in Verilog
- Cooperation with people from different backgrounds
- Publication of two scientific papers, including one as the first author
Teaching/Reseach Assistant Company NameTampere University of Technology Dates EmployedAug 2015 – Dec 2015 Employment Duration5 mos LocationTampere
- Design and verification of an audio processing system using VHDL
- High level synthesis using HLS CatapultC tool
Tampere University of Technology Degree NameMaster's of Science in Information TechnologyField Of StudyPervasive computingGrade3.7/5 Dates attended or expected graduation2014
Activities and Societies: Vendace fishing club board memeber Hefei University of Technology Hefei University of Technology Degree NameBachelor of ScienceField Of StudyElectronic Science and TechnologyGrade82/100 Dates attended or expected graduation2010 – 2014
- DSP, Comp Architecture, ModelSim, Catapult, HLS, SystemVerilog, Functional Programming, Universal Verification Methodology (UVM), Light-weight Dataflow Graph (LIDE) Application
- VHDL,Verilog,Latex, Altera Quartus, Perl, QuestaSim, DeepLearning, CVision, Shell scripting
Advanced Signal Processing, Computer Architecture, DSP Implementation, Satellite Navigation Receivers, Signal Interpretation Methods, System Design
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An Integrated Hardware/Software Design Methodology for Signal Processing Systems publication date2019 publication descriptionJournal of System Architecture
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Design and Implementation of A Multi-mode Harris Corner Detector publication date2017 publication descriptionNORCAS
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Futurice web project Aug 2014
Project descriptionThe aim of the project to develop a single web application which combines several management tools into one mashup. The project, called Project Oracle, combined tools like Pivotal Tracker, Flowdock and Google Drive.
Thanh Tran NUS 2k, software development in both frontend, backend, and database taking Bachelor in Computer Engineering and specialization in Internet of Things in NUS.
Company NameInfineon Technologies Internship Dates EmployedJan 2021 – Jul 2021 Employment Duration7 mos
Company NameSmartGuppy Part-time Dates EmployedJun 2019 – Dec 2020 Employment Duration 1 yr 7 mos • Developed 3 interactive web-pages – WhyShare?, GetInvolved, and About Us – using React • Implemented smart recommendation function to suggest resources of the same subject and level CONERA
Company NameCONERA Internship Dates EmployedMay 2019 – Aug 2019 Employment Duration4 mos • Researched about Beacon and indoor locating methods using Bluetooth Low Energy (BLE) • Developed an Android app using React-native to detect Beacons and apply various methods to locate user • Tested the app in the company environment with the maximum error in result of 5 meters none
Company Namenone Dates EmployedMay 2018 – Aug 2018 Employment Duration4 mos (Participated in small hackathons organized by MindX – a Vietnamese programming school) • Developed a computer-vision-based dancing game in a group of 5 using Python: optimized game sensitivity by experiencing with time delay • Developed a Brick Breaker game in a group of 3 using Java within 12 hours: created multiple game objects and all pixel game graphics using Aseprite • Participated in non-technical aspects of the competitions: Facebook advertisements and presentations to judges
C++, DSA, OOP, WebDev, Java, HTML, C, RTOS, React.js, React Native, JS, Python, Arduino IDE, PostgreSQL, Flask, IoT
Jyri Murto 2nd degree connection2nd Engineer, SoC at Nokia https://www.linkedin.com/in/jyri-murto/
Skills & endorsements Microcontrollers Embedded Systems Python (Programming Language) Industry Knowledge MIG Welding Soldering Electronics Audio Recording Audio Mixing Audio Editing Shell Scripting Database Administration Database Design Front-end Development Tools & Technologies C++ C VHDL Node.js Linux Git Matlab Django REST APIs Django REST Framework SQL Docker Products Interpersonal Skills Easily Adaptable Other Skills Google Search Hand Tools Musicality Open-mindedness Manual latheing Oscilloscope Arc Welding Android Studio Xilinx ISE STM32 Web Application Development Back-End Web Development Database Development Software Deployment
SoC Engineer at Nokia NokiaNokia 2 yrs 11 mos2 yrs 11 mos TampereTampere Engineer, SoCEngineer, SoC Aug 2021 - Present · 5 mosAug 2021 - Present · 5 mos Verification of 5G and other related IP with SystemVerilog/UVMVerification of 5G and other related IP with SystemVerilog/UVM Trainee, SoCTrainee, SoC Feb 2019 - Jul 2021 · 2 yrs 6 mosFeb 2019 - Jul 2021 · 2 yrs 6 mos Verification of 5G and other related IP with SystemVerilog/UVM