Problems with fesvr-zynq on zc702 about fpga-zynq HOT 5 CLOSED

Hi, how about your project?

When I run root@zynq:~# ./fesvr-zynq pk hello, I got a message error: no core found.

I tried both pre-build boot.bin and building from scratch, but I got same error message.

I can run spike pk hello with no problem.

I'm using zc706 board.

from fpga-zynq.

Hi @zxhero,

In one of my attempts to run the code I got to that error message as well.

In the meantime I tried to mess with the fesvr-zynq code and the registers created in zynq_driver.cc for a more direct attempt at trying to figure out what's wrong. I realized that any changes I wrote to them were not persistent. Meaning I wrote to them with no error, but reading again would prove the value had not changed.

I also found out it gets stuck on a loop in the poll function in zynq_driver.cc and that's why I get no response.

I asked someone with a zedboard to try the code and it worked with an old branch of the zedboard image (e85e4b06de).

So far I think the problem comes from fesvr, since I can run everything with spike and since that branch works with zedboard. I don't think it's an issue of the programmable logic but I'm not 100% sure. But I haven't been able to solve the problem and continue the project.

from fpga-zynq.

Hi @ipgul ,

I also think it is a problem of fesvr-zynq.

In my case, it may because mismatch between how fesvr-zynq and debug module internal to rocket-chip communicate (some errors in poll function).

When I tried to use newest fesvr-zynq and an old branch of the fpga-zynq (f03982e), I can get message hello!. But I can not boot riscv-linux.

Then when I tried to use fesvr-zynq compiled from the fpga-zynq (f03982e), eveything worked fine for me.

from fpga-zynq.

Hi @zxhero,

I ran into similar problems as you, when I was trying to set up rocket core on ZC706 FPGA. I was using the pre-build fpga-image files.

root@zynq:~# ./fesvr-zynq pk hello
error: no core found

I followed the instructions to make the fesvr-zynq and updated the fesvr-zynq, libfesvr.so and pk.

That fixed the error!
Hope it helps you

from fpga-zynq.

Hi all,

@zxhero, thanks for pointing out f03982e.

The fpga-zynq f03982e branch worked for me. I made rocket with the riscv-tools version tracked by that branch and used a newer ramdisk image of the ZC706 with a fesvr-zynq from f03982e. The ramdisk from the ZC706 image repository version at the fpga-zynq f03982e commit was not working (the ARM core did not boot), that is why I used a newer one.

I got the "hello!" message and was able to book riscv-linux. Then I used the example from the project-template repository (the PWM MMIO peripheral) and was able to add it to the ZynqSmallConfig design.

For anyone using the ZC702, I only had to modify 3 files. The ZC706 Makefile, the zc706_bd.tcl and the base.xdc constraints file.

In the Makefile I chaged to this:

BOARD = zc702
UBOOT_CONFIG = zc70x
BOARD_MODEL = xilinx.com:zc702:part0:1.0
PART = xc7z020clg484-1
CONFIG = ZynqFPGAConfig

In the contraints file I used:

set_property PACKAGE_PIN D18 [get_ports SYSCLK_P]
set_property` IOSTANDARD LVDS_25 [get_ports SYSCLK_P]

set_property PACKAGE_PIN C19 [get_ports SYSCLK_N]
set_property IOSTANDARD LVDS_25 [get_ports SYSCLK_N]

create_clock -add -name SYSCLK_P -period 5.00 -waveform {0 2.5} [get_ports SYSCLK_P]

And in the tcl I mostly changed the board and device type. I compared the rest with another design I had for the ZC702 and realized the values did not change much, so I left the rest untouched.

Hope this helps!

from fpga-zynq.