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This project forked from llvm-mirror/llvm
Mirror of official llvm git repository located at http://llvm.org/git/llvm.
Home Page: http://llvm.org
License: Other
@@ From Tuleap issue 1317, submitted by rjodin
When having register argument in an asm inline, we need a double % to specify a register ("move %%r18, saved_ktrace_args_in_registers")
But when not having register arguments, if we have a double %%, the asm inline is ignore. Is that case we need a single % to specify a register...
@@ Comments:
** @dfurodet ça marche?
The following code crashes clang:
#include <stdlib.h>
#include <mram.h>
#define TASKLETS_INITIALIZER TASKLET(main, 1024, 0)
#include <rt.h>
char __mram_keep toto[255];
int main(void) {
*((char *) toto) = 0x2a;
return EXIT_SUCCESS;
}
Because of the line *((char *) toto) = 0x2a;
.
Clash report:
fatal error: error in backend: Cannot select: 0x563c48a23810: i32 = addrspacecast[255 -> 0] 0x563c48a23948
0x563c48a23948: i32 = DPUISD::Wrapper TargetGlobalAddress:i32<[255 x i8] addrspace(255)* @toto> 0
0x563c48a23740: i32 = TargetGlobalAddress<[255 x i8] addrspace(255)* @toto> 0
In function: main
clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
clang version 7.1.0 ([email protected]:upmem/clang.git 8e2c3063c7ce02f2b04eb24723e66f6d2d1dcf9f) ([email protected]:upmem/llvm.git 9dce7c1)
Target: dpu-upmem-dpurte
Thread model: posix
InstalledDir: /home/jchauzi/package-sdk-current/upmem-internal/usr/bin
@@ From Tuleap issue 701, submitted by jchauzi
@@ Comments:
** First move and load could be merge as one load (load %r21, %zero, my_table)
@@ From Tuleap issue 1345, submitted by jchauzi
Example:
long attribute ((section(".mram.data"), address_space(255))) my_integer;
long foo() {
return my_integer;
}
We are supposed to use the soft cache mechanism to load my_integer (works when my_integer is a char, short or int), but it is not in that case and we fail to load what we wanted...
When compiling the following code :
#include <stdint.h>
uint32_t dup(uint8_t c) {
return c + (c << 8);
}
I'm getting the following sequence:
lsl r1, r0, 8
or r0, r0, r1
which could be optimized in a single lsl_add
At the end of the day, I'm interested in getting a more optimized sequence for :
uint32_t memset32(int c) {
uint8_t v = c;
return v | (v << 8) | (v << 16) | (v << 24) ;
}
@@ From Tuleap issue 1317, submitted by rjodin
When having register argument in an asm inline, we need a double % to specify a register ("move %%r18, saved_ktrace_args_in_registers")
But when not having register arguments, if we have a double %%, the asm inline is ignore. Is that case we need a single % to specify a register...
@@ Comments:
** @dfurodet ça marche?
Ligne 38:
-g0
: move r14, r18, true, .LBB0_4
-g3
: move r14, r18; jump .LBB0_4
It seems like our MergeInstrPass is not correctly executed with debug symbols enabled.
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