Comments (50)
vanvught
commented on June 7, 2024
Hi [I still don't know your name],
It is working fine for me.
SH1106 (8,21)
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
[V1.3] GD32F407RE Compiled on Nov 21 2022 at 16:12:10
Art-Net 4 Pixel controller {8x 4 Universes}
Network init
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : D
Configuring MDNS
mDNS
Name : gigadevice_472499.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
Configuring Art-Net
ArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
Configuring RDMNet
RDMNet
CID : 99244732-3530-3709-4638-384e148db689
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472499
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 8-WS2812B:100]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.56
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Output
Port 0 1 [HTP] {Art-Net}
Port 4 5 [HTP] {Art-Net}
Port 8 9 [HTP] {Art-Net}
Port 12 16 [HTP] {Art-Net}
Port 16 20 [HTP] {Art-Net}
Port 20 24 [HTP] {Art-Net}
Port 24 28 [HTP] {Art-Net}
Port 28 32 [HTP] {Art-Net}
Bridge
Firmware : 1.25
CID : 99244732-3530-3709-4638-384e148db689
Pixel configuration
Type : WS2812B [3]
Count : 100
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 8
Grouping count : 1 [Groups : 100]
Starting RDMNet
RDMNet started
Starting Art-Net
Art-Net started
gd32f4xx.bin.zip
Makefile.GD32.zip
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Note: Any change in Art-Net, sACN, Pixels needs a reboot.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
I tried many times, bu no success.
The flash chip can't be the issue because it works well on other platforms.
Btw i don't use the bootloader anymore. I modified the firmware flash adress to 0x08000000 so it starts directly. :)
Does using the flash chip without the bootloader causing problems maybe?
I also tried to compile the bootloader with SPI enabled (to see if using with the bootloader is ok) but:
in the makefile.gd32 the source for the libs you used:
LIBS=remoteconfig flashcodeinstall configstore display flashcode
but it does not compile with that.
Instead it compiles with: (as used in the dmx4 makefile):
LIBS=remoteconfig flashcodeinstall configstore flash display flashcode
Because i dont use the dmx4 version but only the artnet pixel, i compiled the bootloader for the BOARD_GD32F407RE.
Anyway, whether the dmx4 version WITH the bootloader nor the pixel version without the bootloader works with the spi flash.
Its detected at the boot of the firmware as you see in the debug above, but does not save the settings.
So i am out of ideas. The Power supply is stable. I also make a software reboot after changes (as you mentioned above) in the RCM. But all settings are lost.
Suly
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Hi Suly,
Does the attached firmware in #4 (comment) work for you? That is the Art-Net pixel firmware for the board BOARD_GD32F407RE.
I will attach the bootloader for board BOARD_GD32F407RE with SPI flash tomorrow.
The bootloader and the firmware are basically independent programs. That is when the firmware is compiled with SPI flash, and you set a fixed ip, then when the bootloader is compiled without SPI flash, than the fixed ip setting is not used when you are running the bootloader.
- Arjan
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Does the attached firmware in #4 (comment) work for you? That is the Art-Net pixel firmware for the board BOARD_GD32F407RE.
I can not test it because i dont have a bootloader with spi enabled. Well i compiled a bootloader with spi enabled but i dont know if the correct flash libs are used, as i mentioned above, i just copied the libs path from dmx4 makefile.
And i cant test it just as firmware without the bootloadee because you compiled it with the default 0x08008000 :)
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
The bootloader and the firmware are basically independent programs. That is when the firmware is compiled with SPI flash, and you set a fixed ip, then when the bootloader is compiled without SPI flash, than the fixed ip setting is not used when you are running the bootloader.
Yes, i know, you mentioned that before.
Normally when i dont use the bootloader at all, and compile the firmware with spi enabled, it should work, because there is no bootloader at startup to change my settings.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
I will attach the bootloader for board BOARD_GD32F407RE with SPI flash tomorrow.
Thank you. I will try with that one then again.
What i dont understand is: why can i compile the firmware for Spi with just LIBS= defined, but cant compile the bootloader? The bootloader needs the flashcodes etc libraries. So my guess is that the firmware is not storing anything but passing to the bootloader to store? Just a thought.
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Hi Suly,
Herewith the bootloader for BOARD=BOARD_GD32F407RE and DEFINES+=CONFIG_STORE_USE_SPI.
With the SPI flash now used by both the bootloader and the firmware, the network configuration made in the firmware is also used by the bootloader.
Arjan
SH1106 (4,21)
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 11:12:39
Bootloader TFTP Server
FMC: Detected GD32F407RE with total 524288 bytes [512 kB]
GD32F407RE, sector size 16384, 524288 bytes [512 kB]
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : S
Rebooting ...
SH1106 (8,21)
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
[V1.3] GD32F407RE Compiled on Nov 21 2022 at 16:12:10
Art-Net 4 Pixel controller {8x 4 Universes}
Network init
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : S
Configuring MDNS
mDNS
Name : gigadevice_472499.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
Configuring Art-Net
ArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
Configuring RDMNet
RDMNet
CID : 99244732-3530-3709-4638-384e148db689
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472499
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 8-WS2812B:100]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.56
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Output
Port 0 1 [HTP] {Art-Net}
Port 4 5 [HTP] {Art-Net}
Port 8 9 [HTP] {Art-Net}
Port 12 16 [HTP] {Art-Net}
Port 16 20 [HTP] {Art-Net}
Port 20 24 [HTP] {Art-Net}
Port 24 28 [HTP] {Art-Net}
Port 28 32 [HTP] {Art-Net}
Bridge
Firmware : 1.25
CID : 99244732-3530-3709-4638-384e148db689
Pixel configuration
Type : WS2812B [3]
Count : 100
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 8
Grouping count : 1 [Groups : 100]
Starting RDMNet
RDMNet started
Starting Art-Net
Art-Net started
Rebooting ...
--> src/node/artnetnode.cpp:Stop:155
<-- src/node/artnetnode.cpp:Stop:181
SH1106 (4,21)
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 11:12:39
Bootloader TFTP Server
FMC: Detected GD32F407RE with total 524288 bytes [512 kB]
GD32F407RE, sector size 16384, 524288 bytes [512 kB]
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : S
Rebooting ...
SH1106 (8,21)
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
[V1.3] GD32F407RE Compiled on Nov 21 2022 at 16:12:10
Art-Net 4 Pixel controller {8x 4 Universes}
Network init
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : S
Configuring MDNS
mDNS
Name : gigadevice_472499.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
Configuring Art-Net
ArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
Configuring RDMNet
RDMNet
CID : 99244732-3530-3709-4638-384e148db689
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472499
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 8-WS2812B:100]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.56
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Output
Port 0 1 [HTP] {Art-Net}
Port 4 5 [HTP] {Art-Net}
Port 8 9 [HTP] {Art-Net}
Port 12 16 [HTP] {Art-Net}
Port 16 20 [HTP] {Art-Net}
Port 20 24 [HTP] {Art-Net}
Port 24 28 [HTP] {Art-Net}
Port 28 32 [HTP] {Art-Net}
Bridge
Firmware : 1.25
CID : 99244732-3530-3709-4638-384e148db689
Pixel configuration
Type : WS2812B [3]
Count : 100
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 8
Grouping count : 1 [Groups : 100]
Starting RDMNet
RDMNet started
Starting Art-Net
Art-Net started
Rebooting ...
--> src/node/artnetnode.cpp:Stop:155
<-- src/node/artnetnode.cpp:Stop:181
No display found
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
[V1.3] GD32F407RE Compiled on Nov 21 2022 at 16:12:10
Art-Net 4 Pixel controller {8x 4 Universes}
Network init
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : D
Configuring MDNS
mDNS
Name : gigadevice_472499.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
Configuring Art-Net
ArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
Configuring RDMNet
RDMNet
CID : 99244732-3530-3709-4638-384e148db689
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472499
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 8-WS2812B:100]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.56
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Output
Port 0 1 [HTP] {Art-Net}
Port 4 5 [HTP] {Art-Net}
Port 8 9 [HTP] {Art-Net}
Port 12 16 [HTP] {Art-Net}
Port 16 20 [HTP] {Art-Net}
Port 20 24 [HTP] {Art-Net}
Port 24 28 [HTP] {Art-Net}
Port 28 32 [HTP] {Art-Net}
Bridge
Firmware : 1.25
CID : 99244732-3530-3709-4638-384e148db689
Pixel configuration
Type : WS2812B [3]
Count : 100
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 8
Grouping count : 1 [Groups : 100]
Starting RDMNet
RDMNet started
Starting Art-Net
Art-Net started
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
. I also make a software reboot after changes (as you mentioned above) in the RCM. But all settings are lost.
Just to be sure; is SPI flash pin 3 WP connected to 3V3?
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Just to be sure; is SPI flash pin 3 WP connected to 3V3?
Hi Arjan,
Yes, pins 3, 7 and 8 are connected to 3v3.
Thanks for the bootloader. I will try it in a couple of minutes.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Still no savings. :(
Is there a possibility to debug the messages of all printf 's . In this case i can see whats preventing it.
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Is there a possibility to debug the messages of all printf 's . In this case i can see whats preventing it.
Add here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-configstore/device/spi/storedevice.cpp#L25` #undef NDEBUG`
Do a make -f Makefile.GD32 clean
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Hi,
so below is the debug : (shows always nResult=0 , is this normal?)
�[37m�[40mNo display found
--> device/spi/storedevice.cpp:StoreDevice:36
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
<-- device/spi/storedevice.cpp:StoreDevice:48
--> device/spi/storedevice.cpp:Read:66
Read() device/spi/storedevice.cpp, line 71: nResult=0
<-- device/spi/storedevice.cpp:Read:72
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 22:52:06
�[32mArt-Net 4 Pixel controller {8x 4 Universes}�[37m
�[33m�[40mNetwork init
�[37mNetwork
Hostname : gigadevice_472B14
IfName : 1: eth0
Inet : 192.168.0.154/24
Netmask : 255.255.255.0
Gateway : 192.168.0.1
Broadcast : 192.168.0.255
Mac : 02:35:32:47:2b:14
Mode : D
�[33m�[40mConfiguring MDNS
�[37mmDNS
Name : gigadevice_472B14.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
�[33m�[40mConfiguring Art-Net
�[37mArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:177
<-- src/node/artnetnode.cpp:SetShortName:195
--> src/node/artnetnode.cpp:SetLongName:199
<-- src/node/artnetnode.cpp:SetLongName:216
�[33m�[40mConfiguring RDMNet
�[37mRDMNet
CID : 142b4732-3530-3702-3959-333282b4b166
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472B14
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 1-WS2812B:170]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.55
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Pixel configuration
Type : WS2812B [3]
Count : 170
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 1
Grouping count : 1 [Groups : 170]
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
�[33m�[40mStarting RDMNet
�[37m�[32m�[40mRDMNet started
�[37m�[33m�[40mStarting Art-Net
�[37m�[32m�[40mArt-Net started
�[37m--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
Rebooting ...
--> src/node/artnetnode.cpp:Stop:147
<-- src/node/artnetnode.cpp:Stop:173
�[37m�[40mNo display found
--> device/spi/storedevice.cpp:StoreDevice:36
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
<-- device/spi/storedevice.cpp:StoreDevice:48
--> device/spi/storedevice.cpp:Read:66
Read() device/spi/storedevice.cpp, line 71: nResult=0
<-- device/spi/storedevice.cpp:Read:72
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 22:52:06
�[32mArt-Net 4 Pixel controller {8x 4 Universes}�[37m
�[33m�[40mNetwork init
�[37mNetwork
Hostname : gigadevice_472B14
IfName : 1: eth0
Inet : 192.168.0.154/24
Netmask : 255.255.255.0
Gateway : 192.168.0.1
Broadcast : 192.168.0.255
Mac : 02:35:32:47:2b:14
Mode : D
�[33m�[40mConfiguring MDNS
�[37mmDNS
Name : gigadevice_472B14.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
�[33m�[40mConfiguring Art-Net
�[37mArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:177
<-- src/node/artnetnode.cpp:SetShortName:195
--> src/node/artnetnode.cpp:SetLongName:199
<-- src/node/artnetnode.cpp:SetLongName:216
�[33m�[40mConfiguring RDMNet
�[37mRDMNet
CID : 142b4732-3530-3702-3959-333282b4b166
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472B14
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 1-WS2812B:170]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.55
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Pixel configuration
Type : WS2812B [3]
Count : 170
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 1
Grouping count : 1 [Groups : 170]
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
�[33m�[40mStarting RDMNet
�[37m�[32m�[40mRDMNet started
�[37m�[33m�[40mStarting Art-Net
�[37m�[32m�[40mArt-Net started
�[37m```
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Also in the lib_configstore makefile.gd32 i noticed there is ram defined by default. Is that normal?
DEFINES =NDEBUG
ifneq ($(MAKE_FLAGS),)
ifneq (,$(findstring CONFIG_STORE_USE_RAM,$(MAKE_FLAGS)))
EXTRA_SRCDIR=device/ram/gd32
endif
else
EXTRA_SRCDIR=device/ram/gd32
DEFINES+=CONFIG_STORE_USE_RAM
endif
include Rules.mk
include ../firmware-template-gd32/lib/Rules.mk
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
shows always nResult=0
That's OK. See below.
nResult = (nReturn < 0) ? storedevice::result::ERROR : storedevice::result::OK;
DEBUG_PRINTF("nResult=%d", static_cast<int>(nResult));
with
namespace storedevice {
enum class result {
OK, ERROR
};
} // namespace storedevice
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
So the DEBUG is saying that it is storing on the flash?
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Also in the lib_configstore makefile.gd32 i noticed there is ram defined by default.
else
EXTRA_SRCDIR=device/ram/gd32
DEFINES+=CONFIG_STORE_USE_RAM
endif
is used when you use the Makefile.GD32 in lib-configstore directly.
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
So the DEBUG is saying that it is storing on the flash?
It tells that the spi_flash_cmd_* functions (https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash.cpp) have completed successfully.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
It tells that the
spi_flash_cmd_*functions (https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash.cpp) have completed successfully.
So why are the settings lost after the reboot then ? I am lost too :)
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Set also a #undef NDEBUG here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-configstore/src/configstore.cpp#L25
And do a make -f Makefile.GD32 clean
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
hold on please
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
oops sorry, i deleted a wrong debug paste . Below is the correct one:
I did a make clean in lib_flash, gd32_emac_artnet_pixel_multi and lib-configstore folders.
�[37m�[40mNo display found
--> device/spi/storedevice.cpp:StoreDevice:36
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
<-- device/spi/storedevice.cpp:StoreDevice:48
--> src/configstore.cpp:ConfigStore:59
--> src/configstore.cpp:Init:84
--> device/spi/storedevice.cpp:Read:66
Read() device/spi/storedevice.cpp, line 71: nResult=0
<-- device/spi/storedevice.cpp:Read:72
Init() src/configstore.cpp, line 122: No signature
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
GetStoreOffset() src/configstore.cpp, line 174: nOffset=272
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
GetStoreOffset() src/configstore.cpp, line 174: nOffset=368
GetStoreOffset() src/configstore.cpp, line 174: nOffset=464
GetStoreOffset() src/configstore.cpp, line 174: nOffset=528
GetStoreOffset() src/configstore.cpp, line 174: nOffset=560
GetStoreOffset() src/configstore.cpp, line 174: nOffset=592
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1072
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1136
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1312
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1344
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2336
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2400
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2432
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2528
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2560
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3584
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3616
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3648
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3712
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3808
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3840
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3872
<-- src/configstore.cpp:Init:143
ConfigStore() src/configstore.cpp, line 75: OFFSET_STORES=32, m_nSpiFlashStoreSize=4064
<-- src/configstore.cpp:ConfigStore:80
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 23:37:59
�[32mArt-Net 4 Pixel controller {8x 4 Universes}�[37m
�[33m�[40mNetwork init
�[37m--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Network]:0 pData=0x1000db68, nDataLength=94, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Network]:0:0x1000db68, nOffset=0, nDataLength=94-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Update() src/configstore.cpp, line 212: pSrc=0x1000db68 [pData], pDst=0x40024020
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
Network
Hostname : gigadevice_472B14
IfName : 1: eth0
Inet : 192.168.0.154/24
Netmask : 255.255.255.0
Gateway : 192.168.0.1
Broadcast : 192.168.0.255
Mac : 02:35:32:47:2b:14
Mode : D
�[33m�[40mConfiguring MDNS
�[37mmDNS
Name : gigadevice_472B14.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
�[33m�[40mConfiguring Art-Net
�[37mArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:177
<-- src/node/artnetnode.cpp:SetShortName:195
--> src/node/artnetnode.cpp:SetLongName:199
<-- src/node/artnetnode.cpp:SetLongName:216
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000de90, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000de90, nOffset=0, nDataLength=135-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000de90 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000dd54, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000dd54, nOffset=0, nDataLength=38-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000dd54 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
�[33m�[40mConfiguring RDMNet
�[37m--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RDM Device]:11 pData=0x1000ddb0, nDataLength=41, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RDM Device]:11:0x1000ddb0, nOffset=0, nDataLength=41-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
Update() src/configstore.cpp, line 212: pSrc=0x1000ddb0 [pData], pDst=0x40024490
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
RDMNet
CID : 142b4732-3530-3702-3959-333282b4b166
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472B14
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 1-WS2812B:170]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.55
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Pixel configuration
Type : WS2812B [3]
Count : 170
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 1
Grouping count : 1 [Groups : 170]
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Display]:15 pData=0x1000dd2c, nDataLength=34, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Display]:15:0x1000dd2c, nOffset=0, nDataLength=34-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
Update() src/configstore.cpp, line 212: pSrc=0x1000dd2c [pData], pDst=0x400248f0
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000dce0, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RConfig]:12:0x1000dce0, nOffset=0, nDataLength=32-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Update() src/configstore.cpp, line 212: pSrc=0x1000dce0 [pData], pDst=0x400244f0
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
�[33m�[40mStarting RDMNet
�[37m�[32m�[40mRDMNet started
�[37m�[33m�[40mStarting Art-Net
�[37m�[32m�[40mArt-Net started
�[37m--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000db78, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RConfig]:12:0x1000db78, nOffset=0, nDataLength=32-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Update() src/configstore.cpp, line 212: pSrc=0x1000db78 [pData], pDst=0x400244f0
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000db78, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RConfig]:12:0x1000db78, nOffset=0, nDataLength=32-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Update() src/configstore.cpp, line 212: pSrc=0x1000db78 [pData], pDst=0x400244f0
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RConfig]:12:0x1000db80, nOffset=0, nDataLength=32-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Update() src/configstore.cpp, line 212: pSrc=0x1000db80 [pData], pDst=0x400244f0
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000db78, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x4
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
<-- src/configstore.cpp:Copy:273
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Network]:0 pData=0x1000db38, nDataLength=94, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Network]:0:0x1000db38, nOffset=0, nDataLength=94-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Update() src/configstore.cpp, line 212: pSrc=0x1000db38 [pData], pDst=0x40024020
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Network]:0 pData=0x1000db38, nDataLength=94, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Network]:0:0x1000db38, nOffset=0, nDataLength=94-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Update() src/configstore.cpp, line 212: pSrc=0x1000db38 [pData], pDst=0x40024020
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Network]:0:0x1000db40, nOffset=0, nDataLength=94-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Update() src/configstore.cpp, line 212: pSrc=0x1000db40 [pData], pDst=0x40024020
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Network]:0 pData=0x1000db38, nDataLength=94, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Copy() src/configstore.cpp, line 257: *pSet=0x2f
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
<-- src/configstore.cpp:Copy:273
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000db10, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000db10, nOffset=0, nDataLength=135-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000db10 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000db10, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000db10, nOffset=0, nDataLength=135-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000db10 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000db10, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000db10, nOffset=0, nDataLength=135-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000db10 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000db10, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000db10, nOffset=0, nDataLength=135-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000db10 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000db18, nOffset=0, nDataLength=135-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000db18 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000db10, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x1e003
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
<-- src/configstore.cpp:Copy:273
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000db70, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000db70, nOffset=0, nDataLength=38-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000db70 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000db70, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000db70, nOffset=0, nDataLength=38-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000db70 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000db70, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000db70, nOffset=0, nDataLength=38-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000db70 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=0
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000db78, nOffset=0, nDataLength=38-0, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000db78 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000db70, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0xff243
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
<-- src/configstore.cpp:Copy:273
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000db70, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0xff243
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
<-- src/configstore.cpp:Copy:273
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000db78, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x4
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
<-- src/configstore.cpp:Copy:273
Rebooting ...
--> src/node/artnetnode.cpp:Stop:147
<-- src/node/artnetnode.cpp:Stop:173
�[37m�[40mNo display found
--> device/spi/storedevice.cpp:StoreDevice:36
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
<-- device/spi/storedevice.cpp:StoreDevice:48
--> src/configstore.cpp:ConfigStore:59
--> src/configstore.cpp:Init:84
--> device/spi/storedevice.cpp:Read:66
Read() device/spi/storedevice.cpp, line 71: nResult=0
<-- device/spi/storedevice.cpp:Read:72
Init() src/configstore.cpp, line 122: No signature
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
GetStoreOffset() src/configstore.cpp, line 174: nOffset=272
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
GetStoreOffset() src/configstore.cpp, line 174: nOffset=368
GetStoreOffset() src/configstore.cpp, line 174: nOffset=464
GetStoreOffset() src/configstore.cpp, line 174: nOffset=528
GetStoreOffset() src/configstore.cpp, line 174: nOffset=560
GetStoreOffset() src/configstore.cpp, line 174: nOffset=592
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1072
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1136
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1312
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1344
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2336
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2400
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2432
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2528
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2560
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3584
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3616
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3648
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3712
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3808
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3840
GetStoreOffset() src/configstore.cpp, line 174: nOffset=3872
<-- src/configstore.cpp:Init:143
ConfigStore() src/configstore.cpp, line 75: OFFSET_STORES=32, m_nSpiFlashStoreSize=4064
<-- src/configstore.cpp:ConfigStore:80
[V1.3] GD32F407RE Compiled on Nov 22 2022 at 23:37:59
�[32mArt-Net 4 Pixel controller {8x 4 Universes}�[37m
�[33m�[40mNetwork init
�[37m--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Network]:0 pData=0x1000db68, nDataLength=94, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Network]:0:0x1000db68, nOffset=0, nDataLength=94-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=32
Update() src/configstore.cpp, line 212: pSrc=0x1000db68 [pData], pDst=0x40024020
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
Network
Hostname : gigadevice_472B14
IfName : 1: eth0
Inet : 192.168.0.154/24
Netmask : 255.255.255.0
Gateway : 192.168.0.1
Broadcast : 192.168.0.255
Mac : 02:35:32:47:2b:14
Mode : D
�[33m�[40mConfiguring MDNS
�[37mmDNS
Name : gigadevice_472B14.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
�[33m�[40mConfiguring Art-Net
�[37mArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:177
<-- src/node/artnetnode.cpp:SetShortName:195
--> src/node/artnetnode.cpp:SetLongName:199
<-- src/node/artnetnode.cpp:SetLongName:216
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Art-Net]:1 pData=0x1000de90, nDataLength=135, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Art-Net]:1:0x1000de90, nOffset=0, nDataLength=135-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=128
Update() src/configstore.cpp, line 212: pSrc=0x1000de90 [pData], pDst=0x40024080
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Pixel]:3 pData=0x1000dd54, nDataLength=38, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Pixel]:3:0x1000dd54, nOffset=0, nDataLength=38-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=304
Update() src/configstore.cpp, line 212: pSrc=0x1000dd54 [pData], pDst=0x40024130
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
�[33m�[40mConfiguring RDMNet
�[37m--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RDM Device]:11 pData=0x1000ddb0, nDataLength=41, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RDM Device]:11:0x1000ddb0, nOffset=0, nDataLength=41-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1168
Update() src/configstore.cpp, line 212: pSrc=0x1000ddb0 [pData], pDst=0x40024490
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
RDMNet
CID : 142b4732-3530-3702-3959-333282b4b166
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472B14
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 1-WS2812B:170]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.55
Short name : AvV Art-Net Node
Long name : GD32F407RE Art-Net 4 https://gd32-dmx.org
Pixel configuration
Type : WS2812B [3]
Count : 170
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 1
Grouping count : 1 [Groups : 170]
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [Display]:15 pData=0x1000dd2c, nDataLength=34, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [Display]:15:0x1000dd2c, nOffset=0, nDataLength=34-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=2288
Update() src/configstore.cpp, line 212: pSrc=0x1000dd2c [pData], pDst=0x400248f0
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> src/configstore.cpp:Copy:241
Copy() src/configstore.cpp, line 248: [RConfig]:12 pData=0x1000dce0, nDataLength=32, nOffset=0, isSetList=1
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Copy() src/configstore.cpp, line 257: *pSet=0x0
--> src/configstore.cpp:Update:193
Update() src/configstore.cpp, line 199: [RConfig]:12:0x1000dce0, nOffset=0, nDataLength=32-1, bSetList=0x0, nOffsetSetList=0
GetStoreOffset() src/configstore.cpp, line 174: nOffset=1264
Update() src/configstore.cpp, line 212: pSrc=0x1000dce0 [pData], pDst=0x400244f0
Update() src/configstore.cpp, line 236: s_State=1
<-- src/configstore.cpp:Update:237
<-- src/configstore.cpp:Copy:261
--> device/spi/storedevice.cpp:Erase:77
Erase() device/spi/storedevice.cpp, line 82: nResult=0
<-- device/spi/storedevice.cpp:Erase:83
--> device/spi/storedevice.cpp:Write:88
Write() device/spi/storedevice.cpp, line 93: nResult=0
<-- device/spi/storedevice.cpp:Write:94
�[33m�[40mStarting RDMNet
�[37m�[32m�[40mRDMNet started
�[37m�[33m�[40mStarting Art-Net
�[37m�[32m�[40mArt-Net started
�[37m
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
After a reboot there is still:
Init() src/configstore.cpp, line 122: No signature
hence the SPI flash is not properly initialized/not written.
I need to think what debug options we have for debugging your issue.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
I need to think what debug options we have for debugging your issue.
Ok thanks for that.
I would like to remind you that i am still on my old router which can assign an IP from the DHCP pool. My new router still assigns an ip with 169.x.y.z ip. Can this DHCP thing maybe a reason also?
And i dont have the 32.768KHZ oscillator installed on the board. Does this make difference?
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Hi Suly,
Please remove the #undef NDEBUG here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-configstore/src/configstore.cpp#L25
Add debug_dump.c in gd32_emac_artnet_pixel_multi/lib
Replace storedevice.cpp in lib-configstore/device/spi
And do a make -f Makefile.GD32 clean
After installed, then please change the Short Name for Art-Net.
Thanks, Arjan
debug_dump.c.zip
storedevice.cpp.zip
--> device/spi/storedevice.cpp:StoreDevice:36
Detected W25Q32BV/W25Q32FV_SPI with sector size 4096 total 4194304 bytes
<-- device/spi/storedevice.cpp:StoreDevice:48
--> device/spi/storedevice.cpp:Read:66
Read() device/spi/storedevice.cpp, line 67: nOffset=3ff000, nLength=4096
Read() device/spi/storedevice.cpp, line 72: Read: nResult=0
0x40024000:128
0000 41 76 56 10 ff ff ff ff ff ff ff ff ff ff ff ff AvV..... ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0030 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ........ ........
<-- device/spi/storedevice.cpp:Read:76
[V1.3] GD32F407RE Compiled on Nov 23 2022 at 13:51:32
Art-Net 4 Pixel controller {8x 4 Universes}
Network init
Network
Hostname : gigadevice_472499
IfName : 1: eth0
Inet : 192.168.2.145/24
Netmask : 255.255.255.0
Gateway : 192.168.2.1
Broadcast : 192.168.2.255
Mac : 02:35:32:47:24:99
Mode : D
Configuring MDNS
mDNS
Name : gigadevice_472499.local
_config._udp.local 10501
_http._tcp.local 80 node=Art-Net Pixel
Configuring Art-Net
ArtNetNode() src/node/artnetnode.cpp, line 66: PAGE_SIZE=4, PAGES=8, MAX_PORTS=32
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
--> src/node/artnetnode.cpp:SetShortName:185
<-- src/node/artnetnode.cpp:SetShortName:202
--> src/node/artnetnode.cpp:SetLongName:206
<-- src/node/artnetnode.cpp:SetLongName:222
Configuring RDMNet
RDMNet
CID : 99244732-3530-3709-4638-384e148db689
LLRP Device configuration
Port UDP : 5569
Multicast join Request : 239.255.250.133
Multicast Response : 239.255.250.134
RDM Device configuration
Manufacturer Name : https://gd32-dmx.org
Manufacturer ID : 5000
Serial Number : 32472499
Root label : GD32F407RE Pixel
Product Category : 0100
Product Detail : 0601
RDM Responder configuration
Protocol Version 1.0
DMX Address : 65535
DMX Footprint : 0
Personality 1 of 1 [Art-Net Pixel 8-WS2812B:100]
Sub Devices : 0
Sensors : 0
Node 4 [8]
Firmware : 1.56
Short name : AvV
Long name : GD32F407RE
Output
Port 0 1 [HTP] {Art-Net}
Port 4 5 [HTP] {Art-Net}
Port 8 9 [HTP] {Art-Net}
Port 12 16 [HTP] {Art-Net}
Port 16 20 [HTP] {Art-Net}
Port 20 24 [HTP] {Art-Net}
Port 24 28 [HTP] {Art-Net}
Port 28 32 [HTP] {Art-Net}
Bridge
Firmware : 1.25
CID : 99244732-3530-3709-4638-384e148db689
Pixel configuration
Type : WS2812B [3]
Count : 100
Mapping : GRB [2]
T0H : 0.31 [0xC0]
T1H : 0.78 [0xF8]
Gamma correction No
Clock: 6400000 Hz
Pixel DMX configuration
Outputs : 8
Grouping count : 1 [Groups : 100]
Starting RDMNet
RDMNet started
Starting Art-Net
Art-Net started
--> device/spi/storedevice.cpp:Erase:81
Erase() device/spi/storedevice.cpp, line 82: nOffset=3ff000, nLength=4096
Erase() device/spi/storedevice.cpp, line 89: Erase: nResult=0
Erase() device/spi/storedevice.cpp, line 94: Read: nResult=0
0x1000db48:128
0000 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0040 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0050 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0060 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
<-- device/spi/storedevice.cpp:Erase:97
--> device/spi/storedevice.cpp:Write:102
Write() device/spi/storedevice.cpp, line 103: nOffset=3ff000, nLength=4064
Write() device/spi/storedevice.cpp, line 110: Write: nResult=0
0x40024000:256
0000 41 76 56 10 ff ff ff ff ff ff ff ff ff ff ff ff AvV..... ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0030 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ........ ........
0080 03 e0 01 00 00 00 00 00 00 00 00 00 41 72 6a 61 ........ ....Arja
0090 6e 00 00 00 00 00 00 00 00 00 00 00 00 00 47 44 n....... ......GD
00a0 33 32 46 34 30 37 52 45 00 00 00 00 00 00 00 00 32F407RE ........
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00e0 00 00 00 00 00 00 00 01 02 03 04 00 00 00 00 00 ........ ........
00f0 00 00 00 00 00 55 00 00 00 00 00 00 00 00 00 00 .....U.. ........
Write() device/spi/storedevice.cpp, line 117: Read: nResult=0
0x1000dac0:256
0000 41 76 56 10 ff ff ff ff ff ff ff ff ff ff ff ff AvV..... ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0030 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ........ ........
0080 03 e0 01 00 00 00 00 00 00 00 00 00 41 72 6a 61 ........ ....Arja
0090 6e 00 00 00 00 00 00 00 00 00 00 00 00 00 47 44 n....... ......GD
00a0 33 32 46 34 30 37 52 45 00 00 00 00 00 00 00 00 32F407RE ........
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00e0 00 00 00 00 00 00 00 01 02 03 04 00 00 00 00 00 ........ ........
00f0 00 00 00 00 00 55 00 00 00 00 00 00 00 00 00 00 .....U.. ........
<-- device/spi/storedevice.cpp:Write:120
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Hi Arjan,
ok, trying now.
Thanks for your precious time.
Suly
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Hi,
had a problem with my Linux, sorry for the late reply.
Attached are debug outputs with WS25Q32 and with WS25X40.
Looks like the WS25Q32 does save but after the reboot data is lost.
The WS25X40 saves too, but missing the letter "U" in my name after a reboot. And after a power off/on all data is gone.
debug WS25Q32.txt
debug WS25X40.txt
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
Hi Suly,
Below is an erase, with the expected FF. Then a write (with just 'U'). And the read back of the SPI flash gives all FF except for the first 2 bytes. It looks like that the SPI flash cannot be written. However, the first 2 bytes are strange.
Please will you add the #undef NDEBUG here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash.cpp#L31
Thanks, Arjan
Erase() device/spi/storedevice.cpp, line 82: nOffset=3ff000, nLength=4096
Erase() device/spi/storedevice.cpp, line 89: Erase: nResult=0
Erase() device/spi/storedevice.cpp, line 94: Read: nResult=0
0x1000db40:128
0000 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0040 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0050 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0060 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
<-- device/spi/storedevice.cpp:Erase:97
--> device/spi/storedevice.cpp:Write:102
Write() device/spi/storedevice.cpp, line 103: nOffset=3ff000, nLength=4064
Write() device/spi/storedevice.cpp, line 110: Write: nResult=0
0x40024000:256
0000 41 76 56 10 ff ff ff ff ff ff ff ff ff ff ff ff AvV..... ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0030 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ........ ........
0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
0090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ........ ........
00e0 00 00 00 00 00 00 00 01 02 03 04 00 00 00 00 00 ........ ........
00f0 00 00 00 00 00 55 00 00 00 00 00 00 00 00 00 00 .....U.. ........
Write() device/spi/storedevice.cpp, line 117: Read: nResult=0
0x1000dab8:256
0000 41 7f ff ff ff ff ff ff ff ff ff ff ff ff ff ff A....... ........
0010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0040 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0050 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0060 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
0090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00c0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
00f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ........ ........
<-- device/spi/storedevice.cpp:Write:120
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
It looks like that the SPI flash cannot be written.
Yes looks like it does not write. But wanted to send you the debug of it anyway. I gave up with the w25q32 flash that i had here.
I will continue with the w25x40 as it stores the data, and also after the reboot its ok. Only when toggling power the data is lost.
Did you have a look at the ws25x40 flash debug? So why is powering off and on the device erases the data? (I make a reboot before of course.)
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particlerain
commented on June 7, 2024
Please will you add the #undef NDEBUG here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash.cpp#L31
Sure, i will send the debug tomorrow. My vm linux had a kernel panic today and didnt boot. Had to make a fresh install! :/
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particlerain
commented on June 7, 2024
I definitely would like to use the spi flash for storing data, but it caused too many problems for me. Because your code works well for you, I ordered some new ones, and will test them too. Hopefully they will be ok. I can only think of a hardware issue of the flash chips now.
Btw, i know you dont want to use ROM to save the settings because of its space. But if its ok for you i would like to try that option as well. Any tips for compiling the firmware with the ROM support? That would be great.
And about the lir2032 battery for bsram, do you know by chance how long a fully charged battery can last on the vbat pin, when the device is not powered on?
Sorry, so many questions but storing the settings is really a challenge for me now :)
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vanvught
commented on June 7, 2024
Hi Suly,
Sorry, so many questions
No worries.
Yes, it is a pretty challenge understanding why the SPI flash chips are not working for you. The base code is almost a decade old, and I have it already since 2018 without any issues.
I have also looked at the ws25x40 debug file. It is very interesting, it seems that the first byte 'A' (from my signature:) is written. And then all others are failing. This looks to me that the code is writting bytes too quickly. Hopefully the new debug will tell more. At this moment, I am puzzled as well.
My configstore device code is based on ROM/SPI flash with a 4KB sector size. Hence support for the GD32F4xx with 128KB would involve a lot of work. And it just does not fit in my framework.
I have no idea about the LIR2032. The datasheet http://eembcn.com/public/Download/Rechargeable-Lithium-Battery/Li-ion-Battery/Button/LIR2032.pdf gives me also not a clear answer.
So why is powering off and on the device erases the data?
I am not convinced that the configuration is stored at all. The write/read to/from the SPI flash (also the ROM) is buffered in RAM. As long as there is power, the configuration is preserved.
I should receive the new GD32F407RE development boards early next week. I have also replaced the crystals with SMD parts, and replaced the USB connector with a better one.
Are you interested in pixel controller? And/or DMX/RDM? I have a nice pixel development board https://github.com/vanvught/GD32F450-Pixel-DMX512. Currently it has an external phy as well. The next versions will have the PHY on the PCB. So many fun items, so little time ;-)
Groet, Arjan
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
The write/read to/from the SPI flash (also the ROM) is buffered in RAM
Ohh ok, that makes sense now.
Yes i saw the gd32f450board, it looks awesome. I started with the f407 now to test if everything works ok for me. Sure the 16x4 U controller is worth checking. As soon as i take control of the spi flash store i can move on to the f450 :)
Will send you the debug now.
Cheers,
Suly
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Here is the debug with #undef NDEBUG here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash.cpp#L31
After starting the device , I tried to save the Short Artname for 10 times without rebooting. So we can see the difference in every save.
After the 4th save, something appeared in the second field. :)
Interesting is, after a reset/reboot LINE 944: spi_flash_probe() src/spi/spi_flash.cpp, line 393: Unsupported manufacturer ef
StoreDevice() device/spi/storedevice.cpp, line 39: No SPI flash chip
After Power on/off device is detected again . LINE 1013 : Detected W25X40 with sector size 4096 total 524288 bytes
This is happening to me very often after reboots or power toggling. It detects the chip sometimes but sometimes not which is ridicoulus to me.
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particlerain
commented on June 7, 2024
I received a brand new w25q32 today, tested it on arduino, write and after power off/on read works fine. But again not on the gd32.
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
It detects the chip sometimes but sometimes not which is ridicoulus to me.
Will you double check the MOSI/MISO connection? It is on breadboard. Right?
Also, the VCC is 3V3?
Adding an(other) decoupling capacitor?
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Will you double check the MOSI/MISO connection? It is on breadboard. Right?
Also, the VCC is 3V3?
Adding an(other) decoupling capacitor?
Miso Mosi is good. I checked it 10000 times.
Vcc 3.3v
Has 100n
Tried also adding 10uf.
But this issue is temporary i think when i move to pcb it will be ok.
Its not happening always. Every 10 boots or something
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vanvught
commented on June 7, 2024
When the SPI speed on the Arduino is lower than 6Mhz then you can change it for the same here https://github.com/vanvught/GD32F407RE-DMX512-RDM/blob/main/lib-flash/src/spi/spi_flash_internal.h#L75
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particlerain
commented on June 7, 2024
I did that already. Tried with 1mhz and even 100khz. Doesnt work.
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particlerain
commented on June 7, 2024
With "doesnt work" i mean the chip is detected as usual, but has write problem.
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vanvught
commented on June 7, 2024
Just to know if reading or writing is not working:
- Boot on GD32, change Art-Net short name.
- Read the first 255 bytes of the last 4KB on Arduino -> start address 0x3ff000
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particlerain
commented on June 7, 2024
Oh, thats a very good idea! Will check it now.
from gd32f407re-dmx512-rdm.
particlerain
commented on June 7, 2024
Tested now, with W25X40 it can NOT write.
But with W25Q32, it wrote !!! They are the exact same letters i wrote. I dont know what the inverted question mark symbol means though... Sign of empty or junk?
In your code i noticed that you are using SPI Fast Read. Can this be the issue maybe? Usually there should be an option for spi_flash_cmd_read_slow but did'nt see in your spi_flash.cpp.
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particlerain
commented on June 7, 2024
I also tested now with the arduino SPI READ FAST option. It shows empty !!!!
So my guess is definetly the spi_flash_cmd_read_fast in storedevice.cpp and spi_flash.cpp is causing this error.
from gd32f407re-dmx512-rdm.
vanvught
commented on June 7, 2024
So my guess is definetly the spi_flash_cmd_read_fast in storedevice.cpp and spi_flash.cpp is causing this error.
That could be the error with your SPI flash. I am not sure what is different with your SPI flash. I have around 20 SPI flash here (W25Q32, W25Q64, W25Q16BV), and they all work fine. Moreover, this is also the same code which is used with the stock Orange Pi Zero LTS, no issues at all.
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vanvught
commented on June 7, 2024
Herewith the datashaat https://www.elinux.org/images/f/f5/Winbond-w25q32.pdf
You can see that the Fast Read is implemented correcrtly.
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particlerain
commented on June 7, 2024
Hi Arjan,
Your implementation for read fast and all your libraries are good.
I was trying to say that with read fast, my spi flash is not working. I ordered more winbonds so i can check again. And will make a board with the flash on it to elliminate cabling.
At least i have an idea now how to move forward.
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particlerain
commented on June 7, 2024
Hi Arjan,
I received new Winbonds W25Q128, 32 etc. They did not work either.
BUT, i found out that the reference circuit for the flash chips involves a lot of pull up resistors. After placing the components now the spi save and read (even after power on/off) works fine. I can even work with 20Mhz spi speeds :)
I thank yo so much for your help and patience with this issue. Once again you proved that you made the perfect code :)
Cheers,
Suly
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vanvught
commented on June 7, 2024
Hi Suly, this is the new GD32F407RE board. I have no time yet, publishing the Eagle, BOM, CLP files on GitHub. Please send me an email ([email protected]) when you would like to receive the files. Groet, Arjan
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particlerain
commented on June 7, 2024
Hi,
sure, thanks. PCB looks great. I will contact you.
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