- ๐ Hi, Iโm @wunderabt
- ๐ Iโm interested in electronics, processors, programming
- ๐ฑ Iโm currently learning scala & chisel & Risc-V
- ๐๏ธ Iโm looking to collaborate on all of the above
- ๐ซ
wunderabt / firrtl Goto Github PK
View Code? Open in Web Editor NEWThis project forked from chipsalliance/firrtl
Flexible Intermediate Representation for RTL
Home Page: https://www.chisel-lang.org/firrtl/
License: Apache License 2.0