This was a project completed for ECE463, Advanced Microprocessor design to simulate a branch predictor. The simulator takes a trace file (examples found in /traces/) in which all addresses are branches, and compares the actual result of the branch (taken or not taken) with the predicted result.

Command line arguments differ depending on which type of predictor is being used. ####bimodal The bimodal predictor uses a single 2ⁱ-bit array of 2-bit counters, where i_B is the number of bits used to index the PC address. All predictors also have an option to utilize a branch target buffer, which stores previously used branches, and only uses the predictor if there is a hit in the buffer.

./sim_bp bimodal <i_B> <i_BTB> <assoc_BTB> <tracefile>

####gshare The gshare predictor uses the same 2ⁱ-bit array of 2-bit counters (i_G), however the index for the predictor table is also determined based on a global branch history register (GHR), an h-bit array holding a history of previous branch outcomes.

./sim_bp gshare <i_G> <h> <i_BTB> <assoc_BTB> <tracefile>

####hybrid The hybrid predictor instatiates both a bimodal and gshare predictor, and uses a 2^i_C-bit array of 2-bit counters to compare the performance of the two predictors, and use the best one.

./sim_bp hybrid <i_C> <i_G> <h> <i_B> <i_BTB> <assoc_BTB> <tracefile>

####yeh/patt The yeah/patt predictor uses a 2^h-bit array of integers called the history table and a 2^p-bit array of 2-bit counters for prediction. The history table acts like the GHR in a gshare predictor, but has a history for every h index. Each value in the history table is used to index the predictor table.

./sim_bp yehpatt <h> <p> <i_BTB> <assoc_BTB> <tracefile>

*Note that for this project, the BTB does not really do anything, as all addresses are branches anyways.