This is a base design (PS only) for EBIT EBAZ4205 Zynq7010 board as a start point to make fun with.

Implemented features:

• DDR3 interface with 256MB memory
• SDIO interface for Micro SD card
• UART1 interface for debug and loggin
• 100M Ethernet with MII interface via EMIO
• GPIO for LED control via EMIO

What're included:

• Pre-built boot images
• Vivado project of FPGA block design
• SDK project for FSBL & device tree
• Configurations and device tree sources for both U-Boot and Kernel
• U-Boot environment variables.

EDA tools:

• Xilinx Vivado 2018.3
• Xilinx SDK 2018.3
• Free Webpack License

TBD.