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http://os.cs.tsinghua.edu.cn/research/undergraduate/hqing2020

Shell 0.75% C++ 0.68% Scheme 0.01% Python 0.03% C 7.80% Objective-C 0.02% Scala 2.69% Tcl 0.19% D 0.33% VHDL 0.07% Verilog 39.94% Assembly 32.53% Rust 0.22% Standard ML 0.01% Coq 0.18% Mathematica 0.01% Makefile 11.99% HTML 2.45% M4 0.10%

undergraduate-hqing2020's Introduction

undergraduate-hqing2020

毕设题目为:用Chisel语言实现RISC-V处理器

毕业设计WIKI链接:http://os.cs.tsinghua.edu.cn/research/undergraduate/hqing2020
本毕设相关文档链接:https://924946804.gitbook.io/chisel-cpu-tutorial/


文件夹说明
chisel_cpu--------------------------------为Linux系统中的Chisel代码工程
undergraduate-heqing2020-master-----------为替换CPU过后总的quartus工程
论文大纲

更新日志
2020.6.21
添加了undergraduate-heqing2020-master文件夹

2020.4.27
删除了文件夹quartus_project
更换chisel_cpu为chisel编译后生成的verilog替换后的verilog CPU

2020.4.21
上传chisel_cpu和quartus_project
CPU替换模块为CU、regfile、id、ex、llbitreg

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